DAC8426 Datasheet, PDF (2/12 Pages) Analog Devices – Quad 8-Bit Voltage Out CMOS DAC Complete with Internal 10 V Reference

DAC8426–SPECIFICATIONS (V_DD = +15 V ؎ 10%, AGND = DGND = 0 V, V_SS = 0 V, T_A = –55؇C to +125؇C
applies for DAC8426AR/BR, T_A = –40؇C to +85؇C applies for DAC8426ER/EP/FR/FP/FS, unless otherwise noted.)
Parameter
Symbol
Conditions
Min Typ Max Units
STATIC PERFORMANCE
Resolution
Total Unadjusted Error¹
Relative Accuracy
Differential Nonlinearity²
Full-Scale Temperature Coefficient
Zero Scale Error
Zero Scale Error
Temperature Coefficient
REFERENCE OUTPUT
Output Voltage
Temperature Coefficient
Load Regulation
Line Regulation
Output Noise³
Output Current
DIGITAL INPUTS
Logic Input “0”
Logic Input “1”
Input Current
Input Capacitance³
POWER SUPPLIES
Positive Supply Current⁴
Negative Supply Current⁴
Power Dissipation⁵
Power Supply Sensitivity
N
TUE
INL
DNL
TCG_FS
V_ZSE
TCV_ZS
Includes Reference
Includes Reference
Dual Supply
8
A, E
B, F
A, E
B, F
25
V_SS = –5 V
10
Bits
± 1 LSB
± 2 LSB
± 1/2 LSB
±1
LSB
± 1 LSB
ppm/°C
20
mV
µV/°C
V_REFOUT
TCV_REFOUT
LD_REG
LN_REG
e_n rms
I_REFOUT
No Load
∆I_L = 5 mA
∆V_DD ± 10%
f = 0.1 Hz to 10 Hz
∆V_REFOUT < 40 mV
A, E
B, F
9.96
9.92
20
0.02
0.008
3
57
10.04
10.08
0.1
0.04
10
V
V
ppm/°C
%/mA
%/V
µV p-p
mA
V_INL
V_INH
I_IN
C_IN
V_IN = 0 V or V_DD
2.4
0.1
4
0.8 V
V
10
µA
8
pF
I_DD
I_SS
P_DISS
P_SS
Dual Supply
∆V_DD = ± 5%
V_SS = –5 V
6
14
mA
4
10
mA
90
210 mW
0.0002 0.01 %/%
ELECTRICAL CHARACTERISTICS V_DD = +15 V ؎ 10%, AGND = DGND = 0 V, V_SS = 0 V, T_A = –55؇C to +125؇C applies for
DAC8426AR/BR, T_A = –40؇C to +85؇C applies for DAC8426ER/EP/FR/FP/FS, unless otherwise noted.
Parameter
Symbol
Conditions
Min Typ⁶ Max Units
DAC OUTPUT
Output Current (Source)³
Output Current (Sink)³
Minimum Load Resistance
I_OUTSOURCE Digital In = All Ones
10
mA
I_OUTSINK
Digital In = All Zeroes V_SS = –5 V
350
450
µA
R_L(MIN)
Digital In = All Ones
2
kΩ
DYNAMIC PERFORMANCE³
V_OUT Slew Rate
SR
V_OUT Settling Time
t_S
(Positive or Negative)
Digital Crosstalk
Q
To ± 1/2 LSB, R_L = 2 kΩ
4
V/µs
3
µs
10
nVs
SWITCHING CHARACTERISTICS³
Address To Write Setup Time
t_AS
Address To Write Hold Time
t_AH
Data Valid To Write Setup Time
t_DS
Data Valid To Write Hold Time
t_DH
Write Pulse Width
t_WR
0
ns
0
ns
70
ns
10
ns
50
ns
NOTES
1_{Includes Full-Scale Error, Relative Accuracy, and Zero Code Error. Note ± 1 LSB = ± 0.39% error.}
2_{All devices guaranteed monotonic over the full operating temperature range.}
3_{Guaranteed and not subject to production test.}
4_{Digital inputs VIN = VINL or VINH; VOUT and VREFOUT unloaded.}
5_{PDISS calculated by IDD × VDD.}
6_{Typicals represent measured characteristics at TA = +25°C.}
Specifications subject to change without notice.
–2–
REV. C