AD9992 Datasheet, PDF (8/92 Pages) Analog Devices – 12-Bit CCD Signal Processor with Precision Timing Generator

AD9992
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
AD9992
A1 CORNER
INDEX AREA
TOP VIEW
(Not to Scale)
1 2 3 4 5 6 7 8 9 10 11
A
B
C
D
E
F
G
H
J
K
L
Figure 3. Pin Configuration
Table 7. Pin Function Descriptions
Pin No.
Mnemonic
A1
GPO8
B2
GPO7
C2
GPO6
B1
GPO5
B4
GPO4
C1
GPO3
D2
GPO2
C3
GPO1
D3
SYNC
E2
VD
D1
HD
E7
RSTB
E6
IOVDD
E5
IOVSS
E3
XVVDD
E1
XSUBCK
F2
XV1
F3
XV2
F7
XV3
G3
XV4
F5
XV5
F6
XV6
G2
XV7
F1
XV8
G1
XV9
G5
XV10
H2
XV11
H1
XV12
G6
XV13
G7
XV14
J2
XV15
J1
XV16
L1
XV17
L2
XV18
Type ¹
DIO
DIO
DIO
DIO
DIO
DIO
DIO
DIO
DI
DIO
DIO
DI
P
P
P
DO
DO
DO
DO
DO
DO
DO
DO
DO
DO
DO
DO
DO
DO
DO
DO
DO
DO
DO
Description
General-Purpose Output 8
General-Purpose Output 7
General-Purpose Output 6
General-Purpose Output 5
General-Purpose Output 4
General-Purpose Output 3
General-Purpose Output 2
General-Purpose Output 1
External System Sync Input
Vertical Sync Pulse (input for slave mode, output for master mode)
Horizontal Sync Pulse (input for slave mode, output for master mode)
External Reset Input (active low pulse to reset, internal pull-up resistor)
Digital I/O Supply: 1.8 V, 3.0 V (GPO, SUBCK, HD/VD, SL, SCK, SDATA, SYNC, RSTB)
Digital I/O Ground
XV Output Supply: 1.8 V, 3.0 V
CCD Substrate Clock
CCD Vertical Clock 1
CCD Vertical Clock 2
CCD Vertical Clock 3
CCD Vertical Clock 4
CCD Vertical Clock 5
CCD Vertical Clock 6
CCD Vertical Clock 7
CCD Vertical Clock 8
CCD Vertical Clock 9
CCD Vertical Clock 10
CCD Vertical Clock 11
CCD Vertical Clock 12
CCD Vertical Clock 13
CCD Vertical Clock 14
CCD Vertical Clock 15
CCD Vertical Clock 16
CCD Vertical Clock 17
CCD Vertical Clock 18
Rev. C | Page 8 of 92