AD9992 Datasheet, PDF (21/92 Pages) Analog Devices – 12-Bit CCD Signal Processor with Precision Timing Generator

HD
HBLK
HBLKTOGE1
HBLKTOGE2
BLANK
BLANK
BASIC HBLK PULSE IS GENERATED USING HBLKTOGE1 AND HBLKTOGE2 REGISTERS (HBLKALT = 0)
Figure 24. Typical Horizontal Blanking Pulse Placement (HBLKMODE = 0)
HD
HBLK
H1/H3/H5/H7
H1/H3/H5/H7
H2/H4/H6/H8
THE POLARITY OF H1/H3/H5/H7 DURING BLANKING IS PROGRAMMABLE
(H2/H4/H6/H8 AND HL ARE SEPARATELY PROGRAMMABLE)
Figure 25. HBLK Masking Polarity Control
HBLK
HBLKTOGE1
HBLKTOGE2
HBLKTOGE4
HBLKTOGE3
HBLKTOGE6
HBLKTOGE5
H1/H3
H2/H4
SPECIAL H-BLANK PATTERN IS CREATED USING MULTIPLE HBLK TOGGLE POSITIONS (HBLKALT = 0)
Figure 26. Using Multiple Toggle Positions for HBLK (HBLKMODE = 0)
AD9992
Rev. C | Page 21 of 92