AD7761_17 Datasheet, PDF (70/76 Pages) Analog Devices – 8-Channel, 16-Bit, Simultaneous Sampling ADC with Power Scaling, 110.8 kHz BW

Data Sheet
AD7761
GPIO WRITE DATA REGISTER
Address: 0x0F, Reset: 0x00, Name: GPIO Write Data
This register writes the values to be set on each of the general-purpose pins when selected as general-purpose outputs. Each bit, from
Bits[4:0], maps directly to the GPIOx pins.
Table 46. Bit Descriptions for GPIO Write Data
Bits
Bit Name
4
GPIO4_WRITE
3
GPIO3_WRITE
2
GPIO2_WRITE
1
GPIO1_WRITE
0
GPIO0_WRITE
Description
FILTER/GPIO4
MODE3/GPIO3
MODE2/GPIO2
MODE1/GPIO1
MODE0/GPIO0
Reset
0x0
0x0
0x0
0x0
0x0
Access
RW
RW
RW
RW
RW
GPIO READ DATA REGISTER
Address: 0x10, Reset: 0x00, Name: GPIO Read Data
This register reads back the value of the logic input level at the general-purpose pins when selected to operate as general-purpose inputs.
Each bit, from Bits[4:0], maps directly to the GPIO0 to GPIO4 pins.
Table 47. Bit Descriptions for GPIO Read Data
Bits
Bit Name
4
GPIO4_READ
3
GPIO3_READ
2
GPIO2_READ
1
GPIO1_READ
0
GPIO0_READ
Description
FILTER/GPIO4
MODE3/GPIO3
MODE2/GPIO2
MODE1/GPIO1
MODE0/GPIO0
Reset
0x0
0x0
0x0
0x0
0x00
Access
R
R
R
R
R
ANALOG INPUT PRECHARGE BUFFER ENABLE REGISTER CHANNEL 0 TO CHANNEL 3
Address: 0x11, Reset: 0xFF, Name: Precharge Buffer 1
This register turns on or off the precharge buffers on the analog inputs. When writing to these registers, the user must write the inverse of
the required bit settings. For example, to clear Bit 1 of this register, the user must write 0x01 to the register. This clears Bit 1 and sets all
other bits. If the user reads the register again after writing 0x01, the data read is 0xFE, as required.
Table 48. Bit Descriptions for Precharge Buffer 1
Bits
Bit Name
7
CH3_PREBUF_NEG_EN
6
CH3_PREBUF_POS_EN
5
CH2_PREBUF_NEG_EN
4
CH2_PREBUF_POS_EN
3
CH1_PREBUF_NEG_EN
2
CH1_PREBUF_POS_EN
1
CH0_PREBUF_NEG_EN
0
CH0_PREBUF_POS_EN
Settings
Description
0 Off
1 On
0 Off
1 On
0 Off
1 On
0 Off
1 On
0 Off
1 On
0 Off
1 On
0 Off
1 On
0 Off
1 On
Reset
0x1
0x1
0x1
0x1
0x1
0x1
0x1
0x1
Rev. A | Page 69 of 75