AD9164 Datasheet, PDF (7/137 Pages) Analog Devices – DAC update rate up to 12 GSPS

AD9164
Parameter
SERDES Supply Currents
VDD_1P2 = 1.2 V
DVDD_1P2 = 1.2 V
PLL_LDO_VDD12 = 1.2 V
SYNC_VDD_3P3 = 3.3 V
NCO ONLY MODE, 5 GSPS
Analog Supply Currents
VDD25_DAC = 2.5 V
VDD12A = 1.2 V
VDD12_CLK = 1.2 V
VNEG_N1P2 = −1.2 V
Digital Supply Currents
DVDD = 1.2 V
IOVDD¹ = 2.5 V
SERDES Supply Currents
VDD_1P2 = 1.2 V
DVDD_1P2 = 1.2 V
PLL_LDO_VDD12 = 1.2 V
SYNC_VDD_3P3 = 3.3 V
8 LANES, 4× INTERPOLATION (80%), 5 GSPS
Analog Supply Currents
VDD25_DAC = 2.5 V
VDD12A = 1.2 V
VDD12_CLK = 1.2 V
VNEG_N1P2 = −1.2 V
Digital Supply Currents
DVDD = 1.2 V (Includes VDD12_DCD/DLL)
DVDD = 1.2 V
IOVDD¹ = 2.5 V
SERDES Supply Currents
VDD_1P2 = 1.2 V
DVDD_1P2 = 1.2 V
PLL_LDO_VDD12 = 1.2 V
SYNC_VDD_3P3 = 3.3 V
8 LANES, 3× INTERPOLATION (80%), 4.5 GSPS
Analog Supply Currents
VDD25_DAC = 2.5 V
VDD12A = 1.2 V
VDD12_CLK = 1.2 V
VNEG_N1P2 = −1.2 V
Digital Supply Currents
DVDD = 1.2 V
IOVDD¹ = 2.5 V
SERDES Supply Currents
VDD_1P2 = 1.2 V
DVDD_1P2 = 1.2 V
PLL_LDO_VDD12 = 1.2 V
SYNC_VDD_3P3 = 3.3 V
Test Conditions/Comments
Includes VTT_1P2, BIAS_VDD_1P2
Connected to PLL_CLK_VDD12
Includes VDD12_DCD/DLL
Includes VTT_1P2, BIAS_VDD_1P2
Connected to PLL_CLK_VDD12
NCO on, FIR85 off (unless otherwise noted)
At 6 GSPS
NCO on, FIR85 off
NCO off, FIR85 on
NCO on, FIR85 on
NCO on, FIR85 on, at 6 GSPS
Includes VTT_1P2, BIAS_VDD_1P2
Connected to PLL_CLK_VDD12
NCO on, FIR85 on
Includes VDD12_DCD/DLL
IOVDD = 2.5 V
Includes VTT_1P2, BIAS_VDD_1P2
Connected to PLL_CLK_VDD12
Rev. A | Page 6 of 136
Data Sheet
Min
Typ
Max Unit
443.4
mA
72.3
mA
81.8
mA
9.4
mA
−119
93.7
10
340.6
−112
425.5
2.5
1.4
1.0
0.13
0.32
100 mA
150 µA
432 mA
mA
753 mA
2.7 mA
34
mA
14.1 mA
1.5 mA
0.43 mA
102
108 mA
80
150 µA
340.5 432.4 mA
408
mA
−127.4 −120.2
mA
665.4
706.5
894.6
1090
2.5
1033 mA
mA
mA
mA
2.7 mA
411.2 550 mA
52.1
73
mA
85.8 105 mA
9.3
11
mA
94
mA
85
175 µA
314.3
mA
−112.1
mA
948.5
mA
2.5
mA
432.3
mA
62.3
mA
84.7
mA
9.2
mA