ADV7302A_15 Datasheet, PDF (61/68 Pages) Analog Devices – Multiformat SD, Progressive Scan/HDTV Video Encoder with Six 11-Bit DACs

Mode 1: Master Option
HSYNC, BLANK, FIELD
(Timing Register 0 TR0 = X X X X X 0 1 1)
In this mode the ADV7302A/ADV7303A can generate horizon-
tal SYNC and odd/even FIELD signals. A transition of the
FIELD input when HSYNC is low indicates a new frame, i.e.,
ADV7302A/ADV7303A
vertical retrace. The blank signal is optional. When the BLANK
input is disabled, the ADV7302A/ADV7303A automatically
blanks all normally blank lines as per CCIR-624. Pixel data is
latched on the rising clock edge following the timing signal
transitions. HSYNC is output on the S_HSYNC Pin, BLANK
on the S_BLANK Pin, and FIELD on the S_VSYNC Pin.
HSYNC
FIELD
BLANK
PAL = 12 ؋ CLOCK/2
NTSC = 16 ؋ CLOCK/2
PIXEL
DATA
Cb Y Cr Y
PAL = 132 ؋ CLOCK/2
NTSC = 122 ؋ CLOCK/2
Figure 100. SD Timing Mode 1 Odd/Even Field Transitions, Master/Slave
REV. A
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