ADV7302A_15 Datasheet, PDF (15/68 Pages) Analog Devices – Multiformat SD, Progressive Scan/HDTV Video Encoder with Six 11-Bit DACs

ADV7302A/ADV7303A
WRITE
SEQUENCE
S
SLAVE ADDR
A(S)
SUB ADDR
A(S)
LSB = 0
DATA
A(S)
LSB = 1
DATA
A(S) P
READ
SEQUENCE
S
SLAVE ADDR A(S)
SUB ADDR
A(S) S SLAVE ADDR A(S)
DATA
A(M)
S = START BIT
P = STOP BIT
A(S) = ACKNOWLEDGE BY SLAVE
A(M) = ACKNOWLEDGE BY MASTER
A(S) = NO-ACKNOWLEDGE BY SLAVE
A(M) = NO-ACKNOWLEDGE BY MASTER
Figure 18. Read and Write Sequence
DATA
A(M) P
REGISTER ACCESSES
The MPU can write to or read from all of the registers of the
ADV7302A/ADV7303A except the subaddress registers that are
write-only registers. The subaddress register determines which
register the next read or write operation accesses. All communica-
tions with the part through the bus start with an access to the
subaddress register. Then a read/write operation is performed
from/to the target address which then increments to the next
address until a stop command on the bus is performed.
REGISTER PROGRAMMING
The following section describes the functionality of each regis-
ter. All registers can be read from as well as written to, unless
otherwise stated.
Subaddress Register (SR7–SR0)
The Communications Register is an 8-bit write-only register.
After the part has been accessed over the bus and a read/write
operation is selected, the subaddress is set up. The Subaddress
Register determines to/from which register the operation
takes place.
Register Select (SR7–SR0)
These bits are set up to point to the required starting address.
REV. A
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