UG-851 Datasheet, PDF (5/15 Pages) Analog Devices – EVAL-AD7606SDZ/EVAL-AD7607SDZ/EVAL-AD7608SDZ User Guide

EVAL-AD7606SDZ/EVAL-AD7607SDZ/EVAL-AD7608SDZ User Guide
UG-851
Table 3. Link Options
Link
Default Position
LK1
A
LK2
Insert
LK3
B
SL1
SL2
SL3
SL4
SL5
SL6
SL7
K0 to 15
A
A
A
A
A
A
A
Do not insert (DNI)
Function
This link is used to select the power supply source for the evaluation board.
In Position A, the board is powered with the J1 wall mounted switching supply.
In Position B, the J3 terminal block is the source.
This link is used to supply the SDP power supply form the evaluation board
The EVAL-SDP-CB1Z is powered from the ADP7104 5 V linear regulator
LK3 is used to select the VDRIVE source for the AD7606/AD7606-6/AD7606-4/AD7607/AD7608.
In Position A, the AD7606/AD7606-6/AD7606-4/AD7607/AD7608 are supplied with 3.3 V VDRIVE.
In Position B, the AD7606/AD7606-6/AD7606-4/AD7607/AD7608 are supplied with 5 V VDRIVE, 5 V VDRIVE
is needed to run the device at 200 kSPS in serial interface mode.
In Position A, the CS signal is supplied from the SDP terminal, J2.
In Position B, The CS SMB is selected.
In Position A, the SCLK signal is supplied from the SDP terminal, J2.
In Position B, the SCLK SMB is selected.
In Position A, the STBY signal is supplied from the SDP terminal, J2.
In Position B, the STBY SMB is selected.
In Position A, the CS signal is supplied from the SDP terminal, J2.
In Position B, the CS SMB is selected.
In Position A, the RESET signal is supplied from the SDP terminal, J2.
In Position B, the RESET SMB is selected.
In Position A, the CS signal is supplied from the SDP terminal, J2.
In Position B, the CS SMB is selected.
In Position A, the CONVST signal is supplied from the SDP terminal, J2.
In Position B, the CONVST SMB is selected.
Solder links for bypassing the U level translator.
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