ADSP-21160N Datasheet, PDF (43/53 Pages) Analog Devices – DSP Microcomputer

April 2002
PRELIMINARY TECHNICAL DATA
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ADSP-21160N
RCLK
DATA RECEIVE— INTERNAL CLOCK
DRIVE
EDGE
t_SCLKIW
SAMPLE
EDGE
t_HOFSE
RFS
t_DFSE
t_SFSI
t_SDRI
t_HFSI
t_HDRI
DATA RECEIVE— EXTERNAL CLOCK
DRIVE
EDGE
t_SCLKW
SAMPLE
EDGE
RCLK
t_HOFSE
t_DFSE
t_SFSE
t_HFSE
RFS
t_SDRE
t_HDRE
DR
DR
NOTE: EITHER THE RISING EDGE OR FALLING EDGE OF RCLK, TCLK CAN BE USED AS THE ACTIVE SAMPLING EDGE.
DATA TRANSMIT— INTERNAL CLOCK
DRIVE
EDGE
t_SCLKIW
SAMPLE
EDGE
TCLK
t_HOFSI
t_DFSI
t_SFSI
TFS
t_HDTI
t_DDTI
DT
t_HFSI
DATA TRANSMIT— EXTERNAL CLOCK
DRIVE
EDGE
t_SCLKW
SAMPLE
EDGE
TCLK
t_HOFSE
t_DFSE
t_SFSE
t_{H FSE}
TFS
t_HDTE
t_DDTE
DT
NOTE: EITHER THE RISING EDGE OR FALLING EDGE OF RCLK, TCLK CAN BE USED AS THE ACTIVE SAMPLING EDGE.
DRIVE EDGE
DRIVE EDGE
TCLK
(EXT)
DT
TCLK
(INT)
t_DDTEN
DRIVE
EDGE
t_DDTIN
TCLK /
RCLK
TCLK /
RCLK
t_{DD TT E}
DRIVE
EDGE
t_DDTTI
DT
Figure 28. Serial Ports
REV. PrB ^{This information applies to a product under development. Its characteristics and specifications are subject to change without notice. Analog}
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