ADSP-21160N Datasheet, PDF (1/53 Pages) Analog Devices – DSP Microcomputer

PRELIMINARY TECHNICAL DATA
a
Preliminary Technical Data
DSP Microcomputer
ADSP-21160N
SUMMARY
High-Performance 32-Bit DSP—Applications in Audio,
Medical, Military, Graphics, Imaging, and
Communication
Super Harvard Architecture—Four Independent Buses
for Dual Data Fetch, Instruction Fetch, and
Nonintrusive, Zero-Overhead I/O
Backwards-Compatible—Assembly Source Level
Compatible with Code for ADSP-2106x DSPs
Single-Instruction-Multiple-Data (SIMD) Computational
Architecture—Two 32-Bit IEEE Floating-Point
Computation Units, Each with a Multiplier, ALU,
Shifter, and Register File
Integrated Peripherals—Integrated I/O Processor,
4 M Bits On-Chip Dual-Ported SRAM, Glueless
Multiprocessing Features, and Ports (Serial, Link,
External Bus, and JTAG)
KEY FEATURES
95 MHz (10.5 ns) Core Instruction Rate
Single-Cycle Instruction Execution, Including SIMD
Operations in Both Computational Units
570 MFLOPS Peak and 380 MFLOPS Sustained
Performance (Based on FIR)
Dual Data Address Generators (DAGs) with Modulo and
Bit-Reverse Addressing
Zero-Overhead Looping and Single-Cycle Loop Setup,
Providing Efficient Program Sequencing
IEEE 1149.1 JTAG Standard Test Access Port and
On-Chip Emulation
400-Ball 27 ؋ 27 mm Metric PBGA Package
FUNCTIONAL BLOCK DIAGRAM
CORE PROCESSOR
TIMER
INSTRUCTION
CACHE
32 X 48-BIT
DAG1 DAG2
8X4X32 8X4X32
PROGRAM
SEQUENCER
PM ADDRESS BUS
32
DM ADDRESS BUS
32
BUS
CONNECT
(PX)
PM DATA BUS 16/32/40/48/64
DM DATA BUS
32/40/64
DUAL-PORTED SRAM
TWO INDEPENDENT
DUAL-PORTED BLOCKS
PROCESSOR PORT
I/O PORT
ADDR
DATA
DATA ADDR
ADDR
DATA
DATA ADDR
IOD
IOA
64
18
JTAG
6
TEST AND
EMULATION
EXTERNAL
PORT
32
ADDR BUS
MUX
MULTIPROCESSOR
INTERFACE
DATA BUS
64
MUX
HOST PORT
MULT
DATA
REGISTER
FILE
(PEX)
16 X 40-BIT
BARREL
SHIFTER
ALU
REV. PrB
BARREL
SHIFTER
DATA
REGISTER
FILE
(PEY)
16 X 40-BIT
MULT
ALU
IOP
DMA
4
REGISTERS
CONTROLLER
(MEMORY
6
MAPPED)
SERIAL PORTS
(2)
6
CONTROL,
STATUS, AND
LINK PORTS
60
DATA BUFFERS
(6)
I/O PROCESSOR
This information applies to a product under development. Its characteristics and speci-
fications are subject to change without notice. Analog Devices
assumes no obligation regarding future manufacturing unless otherwise agreed to in
writing.
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©Analog Devices,Inc., 2002