ADSP-21160N Datasheet, PDF (29/53 Pages) Analog Devices – DSP Microcomputer

PRELIMINARY TECHNICAL DATA
April 2002
For current information contact Analog Devices at 800/262-5643
ADSP-21160N
Synchronous Read/Write—Bus Slave
Use these specifications for ADSP-21160N bus master accesses of a slave’s IOP registers or internal memory (in multipro-
cessor memory space). The bus master must meet these (bus slave) timing requirements.
Table 13. Synchronous Read/Write—Bus Slave
Parameter
Timing Requirements:
t_SADDI
Address, BRST Setup Before CLKIN
t_HADDI
t_SRWI
t_HRWI
t_SSDATI
t_HSDATI
Address, BRST Hold After CLKIN
RDx/WRx Setup Before CLKIN
RDx/WRx Hold After CLKIN
Data Setup Before CLKIN
Data Hold After CLKIN
Switching Characteristics:
t_DDATO
t_HDATO
t_DACKC
t_HACKO
Data Delay After CLKIN
Data Hold After CLKIN
ACK Delay After CLKIN
ACK Hold After CLKIN
Min
Max
Unit
5
ns
1
ns
5
ns
1
ns
5.5
ns
1
ns
0.25 t_CCLK + 9
ns
1.5
ns
10
ns
1.5
ns
REV. PrB ^{This information applies to a product under development. Its characteristics and specifications are subject to change without notice. Analog}
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Devices assumes no obligation regarding future manufacturing unless otherwise agreed to in writing.