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AD9974BBCZ Datasheet, PDF (40/52 Pages) Analog Devices – Dual-Channel, 14-Bit, CCD Signal Processor with Precision Timing Core
AD9974
LAYOUT OF INTERNAL REGISTERS
The AD9974 address space is divided into two register areas, as
shown in Figure 54. In the first area, Address 0x00 to Address 0x72
contain the registers for the AFE, miscellaneous functions, VD/HD
parameters, I/O control, mode control, timing core, and update
control functions. The second area of the address space, beginning
at Address 0x800, consists of the registers for the H-pattern groups
and fields. This is a configurable set of register spaces; the user
can decide how many H-patterns and fields are used in a particular
design. The AD9974 supports the use of up to 32 H-patterns.
Register 0x28 specifies the total number of H-pattern groups.
The starting address for the H-pattern groups is always 0x800.
The starting address for the field registers is determined by the
number of H-pattern groups. Each H-pattern group and field
occupies 16 register addresses.
The starting address for the field registers is based on the
number of H-pattern groups and is equal to 0x800 plus the
number of H-pattern groups times 16.
It is important to note that the H-pattern and field registers
must always occupy a continuous block of addresses.
Figure 55 shows an example when three H-pattern groups and
two fields are used. The starting address for the H-pattern groups
is always 0x800. Because HPATNUM is 3, the H-pattern groups
occupy 48 address locations (that is, 16 registers × 3 H-pattern
groups). The starting address of the field registers for this example
is 0x830 (that is, 0x800 + 48 (decimal)). Note that the decimal value
must be converted to a hex number before adding it to 0x800.
The AD9974 address space contains many unused addresses. Any
undefined addresses between Address 0x00 and Address 0x7FF
should not be written to; otherwise, the AD9974 may operate
incorrectly. Continuous register writes should be performed
carefully so that undefined registers are not written to.
ADDR 0x000
FIXED REGISTER AREA
AFE REGISTERS
MISCELLANEOUS FUNCTION REGISTERS
VD/HD REGISTERS
I/O REGISTERS
MODE CONTROL REGISTERS
TIMING CORE REGISTERS
TEST REGISTERS
HPAT START 0x800
CONFIGURABLE REGISTER AREA
H-PATTERN GROUPS
FIELD START
UPDATE CONTROL REGISTERS
FIELDS
ADDR 0x7FF
INVALID—DO NOT ACCESS
MAX 0xFFF
NOTES
1. THE H-PATTERN AND FIELD REGISTERS MUST ALWAYS OCCUPY A CONTINUOUS BLOCK OF ADDRESSES.
Figure 54. Layout of AD9974 Registers
ADDR 0x800
3 H-PATTERN GROUPS
(16 × 3 = 48 REGISTERS)
ADDR 0x830
2 FIELDS
(16 × 2 = 32 REGISTERS)
ADDR 0x850
MAX 0xFFF
UNUSED MEMORY
Figure 55. Example Register Configuration
Rev. A | Page 40 of 52