AMIS30623C623BRG Datasheet, PDF (36/61 Pages) ON Semiconductor – Micro-stepping Motor Driver

AMIS−30623
LIN CONTROLLER
General Description
The LIN (local interconnect network) is a serial
communications protocol that efficiently supports the
control of mechatronics nodes in distributed automotive
applications. The physical interface implemented in the
AMIS−30623 is compliant to the LIN rev. 2.0 & 2.1
specifications. It features a slave node, thus allowing for:
• single−master / multiple−slave communication
• self synchronization without quartz or ceramics
resonator in the slave nodes
• guaranteed latency times for signal transmission
• single−signal−wire communication
• transmission speed of 19.2 kbit/s
• selectable length of Message Frame: 2, 4, and 8 bytes
• configuration flexibility
• data checksum (classic checksum, cf. LIN1.3) security
and error detection
• detection of defective nodes in the network
It includes the analog physical layer and the digital
protocol handler.
The analog circuitry implements a low side driver with a
pull−up resistor as a transmitter, and a resistive divider with
a comparator as a receiver. The specification of the line
driver/receiver follows the ISO 9141 standard with some
enhancements regarding the EMI behavior.
V_BB
to
control
block
30 kW
RxD
LIN
protocol
Filter
LIN
handler
TxD
Slope
Control
LIN address
from OTP
HW0
HW1
HW2
Figure 21. LIN Interface
Slave Operational Range for Proper Self
Synchronization
The LIN interface will synchronize properly in the
following conditions:
• Vbat ≥ 8 V
• Ground shift between master node and slave node < ±1 V
It is highly recommended to use the same type of reverse
battery voltage protection diode for the Master and the Slave
nodes.
Functional Description
Analog Part
The transmitter is a low−side driver with a pull−up resistor
and slope control. The receiver mainly consists of a
comparator with a threshold equal to V_BB/2. Figure 5 shows
Table 30. LIN ERROR REGISTER
Bit 7
Bit 6
Bit 5
Not
used
Not
used
Not
used
Bit 4
Not
used
the characteristics of the transmitted and received signal.
See AC Parameters for timing values.
Protocol Handler
This block implements:
• Bit synchronization
• Bit timing
• The MAC layer
• The LLC layer
• The supervisor
Error Status Register
The LIN interface implements a register containing an
error status of the LIN communication. This register is as
follows:
Bit 3
Time
out error
Bit 2
Data
error Flag
Bit 1
Header
error Flag
Bit 0
Bit
error Flag
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