AD9927_15 Datasheet, PDF (30/100 Pages) Analog Devices – 14-Bit CCD Signal Processor with V-Driver and Precision Timing Generator

AD9927
Vertical Pattern Groups (VPAT)
The vertical pattern groups define the individual pulse patterns
for each XV1 to XV24 output signal. Table 13 summarizes the
registers available for generating each of the V-pattern groups.
The first, second, third, and fourth toggle positions (VTOG1,
VTOG2, VTOG3, and VTOG4) are the pixel locations within
the line where the pulse transitions. All toggle positions are
13-bit values, allowing their placement anywhere in the
horizontal line.
More registers are included in the vertical sequence registers to
specify the output pulses. VPOL specifies the start polarity for
each signal; VSTART specifies the start position of the
V-pattern group within the line; VLEN designates the total
length of the V-pattern group, which determines the number of
pixels between each of the pattern repetitions when repetitions
are used.
The VSTART position is actually an offset value for each toggle
position. The actual pixel location for each toggle, measured
from the HD falling edge (Pixel 0), is equal to the VSTART
value plus the toggle position.
When the selected V-output is designated as a VSG pulse, either
the VTOG1/VTOG2 or VTOG3/VTOG4 pair is selected using
V-Sequence Address 0x02, VSGPATSEL. All four toggle positions
are not simultaneously available for VSG pulses.
All unused V-channels must have their toggle positions
programmed to either 0 or maximum value. This prevents
unpredictable behavior because the default values of the
V-pattern group registers are unknown.
Table 13. Vertical Pattern Group Registers
Register
Length
Description
VTOG1
13b
First toggle position within line for each XV1 to XV24 output, relative to VSTART value
VTOG2
13b
Second toggle position, relative to VSTART value
VTOG3
13b
Third toggle position, relative to VSTART value
VTOG4
13b
Fourth toggle position, relative to VSTART value
START POSITION OF VERTICAL PATTERN GROUP IS PROGRAMMABLE IN VERTICAL SEQUENCE REGISTERS.
HD
4
XV1
1
2
3
XV2
1
2
3
XV24
1
2
3
PROGRAMMABLE SETTINGS:
1_{START POLARITY (LOCATED IN V-SEQUENCE REGISTERS).}
2_{FIRST TOGGLE POSITION.}
3_{SECOND TOGGLE POSITION (THIRD AND FOURTH TOGGLE POSITIONS ALSO AVAILABLE FOR MORE COMPLEX PATTERNS).}
4_{TOTAL PATTERN LENGTH FOR ALL VERTICAL OUTPUTS (LOCATED IN VERTICAL SEQUENCE REGISTERS).}
Figure 35. Vertical Pattern Group Programmability
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