EVAL-ADF4113EBZ1 Datasheet, PDF (24/28 Pages) Analog Devices – RF PLL Frequency Synthesizers

ADF4110/ADF4111/ADF4112/ADF4113
Data Sheet
FREF_IN
VP
POWER-DOWN CONTROL
V_DD
7
15 16 10
AV_DD DV_DD V_P CE
8
CP ²
REF_IN
R_SET ¹
ADF4110
ADF4111
ADF4112
ADF4113
4.7kΩ
100pF
RF_INA 6
RF_INB 5
LOOP
FILTER
51Ω
3 49
100pF
S
V_DD
IN ADG701
D
GND
100pF
RF_OUT
V_CC
VCO
GND
100pF _18Ω ^18Ω
18Ω
DECOUPLING CAPACITORS AND INTERFACE SIGNALS HAVE
BEEN OMITTED FROM THE DIAGRAM TO INCREASE CLARITY.
Figure 35. Local Oscillator Shutdown Circuit
FREF_IN
VDD
VP
1000pF
51Ω
7
15 16
AV_DD DV_DD
1000pF
8 REF_IN
V_{P 2}
CP
R_SET ¹
ADF4113
2.8nF
4.7kΩ
3.3kΩ
19nF
680Ω
CE
CLK MUXOUT 14
DATA
LOCK
DETECT
LE
100pF
RF_INA ₆
RF_INB ₅
51Ω
20V
3kΩ
1kΩ
AD820
130pF
3
4
9
100pF
RFOUT
12V
100pF
V_{CC OUT 100pF 18Ω}
18Ω
V_TUNE
18Ω
M3500-2235
GND
DECOUPLING CAPACITORS ON AVDD, DVDD, VP OF THE ADF4113
AND ON VCC OF THE M3500-2250 HAVE BEEN OMITTED FROM
THE DIAGRAM TO AID CLARITY.
Figure 36. Wideband Phase-Locked Loop
Rev. F | Page 24 of 28