EVAL-ADF4113EBZ1 Datasheet, PDF (16/28 Pages) Analog Devices – RF PLL Frequency Synthesizers

ADF4110/ADF4111/ADF4112/ADF4113
Table 8. AB Counter Latch Map
Data Sheet
RESERVED
13-BIT B COUNTER
6-BIT A COUNTER
CONTROL
BITS
DB23 DB22 DB21 DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 DB10 DB9 DB8 DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
X
X G1 B13 B12 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 A6 A5 A4 A3 A2 A1 C2 (0) C1 (1)
X = DON'T CARE
A6
A5
••••••••• •
A2
A1
A COUNTER
DIVIDE RATIO
0
0
••••••••• •
0
0
0
0
0
••••••••• •
0
1
1
0
0
••••••••• •
1
0
2
0
0
••••••••• •
1
1
3
•
•
••••••••• •
•
•
•
•
•
••••••••• •
•
•
•
•
•
••••••••• •
•
•
•
1
1
••••••••• •
0
0
60
1
1
••••••••• •
0
1
61
1
1
••••••••• •
1
0
62
1
1
••••••••• •
1
1
63
B13
B12
B11 ••••••••• •
B3
B2
0
0
0
••••••••• •
0
0
0
0
0
••••••••• •
0
0
0
0
0
••••••••• •
0
1
0
0
0
••••••••• •
0
1
0
0
0
••••••••• •
1
0
•
•
•
••••••••• •
•
•
•
•
•
••••••••• •
•
•
•
•
•
••••••••• •
•
•
1
1
1
••••••••• •
1
0
1
1
1
••••••••• •
1
0
1
1
1
••••••••• •
1
1
1
1
1
••••••••• •
1
1
B1 B COUNTER DIVIDE RATIO
0
NOT ALLOWED
1
NOT ALLOWED
0
NOT ALLOWED
1
3
0
4
•
•
•
•
•
•
0
8188
1
8189
0
8190
1
8191
F4 (FUNCTION LATCH)
FASTLOCK ENABLE*
0
0
1
1
*SEE TABLE 9
THESE BITS ARE NOT USED
BY THE DEVICE AND ARE
DON'T CARE BITS
CP GAIN
0
1
0
1
OPERATION
CHARGE PUMP CURRENT SETTING 1
IS PERMANENTLY USED.
CHARGE PUMP CURRENT SETTING 2
IS PERMANENTLY USED.
CHARGE PUMP CURRENT SETTING 1
IS USED.
CHARGE PUMP CURRENT IS SWITCHED
TO SETTING 2. THE TIME SPENT IN
SETTING 2 IS DEPENDENT UPON WHICH
FASTLOCK MODE IS USED. SEE FUNCTION
LATCH DESCRIPTION.
N = BP + A, P IS PRESCALER VALUE SET IN THE
FUNCTION LATCH, B MUST BE GREATER THAN OR
EQUAL TO A. FOR CONTINUOUSLY ADJACENT VALUES
OF (NX FREF), AT THE OUTPUT, N_MIN IS (P²â€“P).
Rev. F | Page 16 of 28