OP215 Datasheet, PDF (2/8 Pages) Analog Devices – Dual Precision JFET-Input Operational Amplifier

OP215–SPECIFICATIONS
ELECTRICAL CHARACTERISTICS (at V_S = ±15 V, T_A = 25؇C, unless otherwise noted.)
Parameter
Symbol Conditions
OP215E
Min Type Max
OP215G
Min Type Max
Unit
Input Offset Voltage
V_OS
R_S = 50 W
‘G’ Grade
0.2 1.0
2.0 4.0
mV
2.5 6.0
mV
Input Offset Current¹ I_OS
T_j = 25∞C
Device Operating
3
50
5
100
3
100 pA
5
200 pA
Input Bias Current¹
I_B
Input Resistance
R_IN
Large-Signal Voltage A_VO
Gain
Output Voltage Swing V_O
Supply Current
I_SY
T_j = 25∞C
Device Operating
R_L Ն 2 kW,
V_O = ± 10 V
R_L = 10 kW
R_L = 2 kW
‘G’ Grade
± 15
± 18
10^1,2
± 100
± 300
150 500
50
± 15
± 18
10^1,2
200
± 300
± 600
pA
pA
W
V/mV
± 12 ± 13
± 11 ± 12.7
6.0 8.5
± 12 ± 13
V
± 11 ± 12.7
V
7.0 10.0 mA
7.0 12.0 mA
Slew Rate
Gain Bandwidth
Product³
SR
GBW
A_VCL = 1
10
18
3.5 5.7
5
15
3.0 5.4
V/␮s
MHz
Closed-Loop Bandwidth CLBW A_VCL = 1
13
Setting Time
t_S
To 0.01%
2.3
To 0.05%²
1.1
To 0.10%
0.9
12
MHz
2.4
␮s
1.2
␮s
1.0
␮s
Input Voltage Range IVR
10.2 14.8
–10.2 –11.5
10.1 14.8
V
–10.1 –11.5
V
Common-Mode
CMRR V_CM = ± IVR
82
100
80
96
dB
Rejection Ratio
E, G Grades
Power Supply Rejection PSRR
Ratio
Input Noise Voltage
␪n
Density
Input Noise Current
I_n
Density
V_S = ± 10 V to ± 16 V
V_S = ± 10 V to ± 15 V
f_O = 100 Hz
f_O = 1,000 Hz
f_O = 100 Hz
f_O = 1,000 Hz
10
51
20
15
0.01
0.01
16
100
20
15
0.01
0.01
␮V/V
␮V/V
nV/÷Hz
nV/÷Hz
pA/÷Hz
pA/÷Hz
Input Capacitance
C_IN
3
3
pF
NOTES
1_{Input bias current is specified for two different conditions. The Tj = 25∞C specification is with the junction at ambient temperature; the device operating specification is}
with the device operating in a warmed up condition at 25∞C ambient. The warmed up bias-current value is correlated to the junction temperature value via the curves
of I_S versus T_j and I_S versus T_A. PMI has a bias-current compensation circuit that gives improved bias current and bias current over temperature versus standard
JFET input op amps. I_S and I_OS are measured at V_CM = 0.
2_{Setting time is defined here for a unity gain inverter connection using 2 kW resistors. It is the time required for the error voltage (the voltage at the inverting input pin}
on the amplifier) to settle to within a specified percent of its final value from the time a 10 V step input is applied to the inverter. See setting time test circuit.
3_{Sample tested.}
Specifications are subject to change without notice.
–2–
REV. A