SW06 Datasheet, PDF (11/12 Pages) Analog Devices – Quad SPST JFET Analog Switch

fastest reset times. The switch can easily handle any amount of
capacitor discharge current subject only to the maximum heat
dissipation of the package and the maximum operating junction
temperature from which repetition can be established.
SWITCHING
Switching time t_ON and t_OFF characteristics are plotted versus
V_ANALOG and temperature. In all cases, t_OFF is designed faster
than t_ON to ensure a break-before-make interval for SPDT and
DPDT applications. The disable input (DIS) has the same
switching times (t_ON and t_OFF) as the logic inputs (IN_X).
Switching transients occurring at the source and drain contacts
results from ac coupling of the switching FETs gate-to-source
and gate-to-drain coupling capacitance. The switch turn ON
will cause a negative going spike to occur and the turn OFF will
cause a positive spike to occur. These spikes can be reduced by
additional capacitance loading, lower values of R_L, or switching
an additional switch (with its extra contact floating) to the op-
posite state connected to the spike sensitive node.
SW06
DISABLE NODE
This TTL compatible node is similar to the logic inputs IN_X but
has an internal 2 µA current source pull-up. If disable is left un-
connected, it will assume the logic “1” state, then the state of
the switches is controlled only by the logic inputs IN_X.
POWER SUPPLIES
This product operates with power supply voltages ranging from
± 12 to ± 18 volts; however, the specifications only guarantee
device parameters with ± 15 volt ± 5% power supplies. The
power supply sensitive parameters have plots to indicate effects
of supply voltages other than ± 15 volts.
Typical Applications
Operation from Single Positive Power Supply
4-Channel Sample Hold Amplifier
REV. A
High Off Isolation Selector Switch (Shunt-Series Switch)
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