ACE25Q512G Datasheet, PDF (9/42 Pages) ACE Technology Co., LTD. – 512K BIT SPI NOR FLASH Memory Series

ACE25Q512G
512K BIT SPI NOR FLASH Memory Series
Write Protect Features
1. Software Protection: The Block Protect (SEC, TB, BP2, BP1, BP0) bits define the section of the
memory array that can be read but not change.
2.Hardware Protection: /WP going low to protected the BP0~SEC bits and SRP0~1 bits.
3.Deep Power-Down: In Deep Power-Down Mode, all instructions are ignored except the
Release from deep Power-Down Mode instruction.
4.Write Enable: The Write Enable Latch (WEL) bit must be set prior to every Page Program, Sector
Erase, Block Erase, Chip Erase, Write Status Register and Erase/Program Security Registers
instruction.
Status Register Memory Protection
Protect Table
Table 6 ACE25Q512G Status Register Memory Protection
Status Register Content
Memory Content
SEC TB BP2 BP1 BP0 Blocks
Addresses
Density
Portion
0
X
X
0
0
NONE
NONE
NONE
NONE
0
X
X
0
1
0
000000H-00FFFFH
64KB
ALL
0
X
X
1
X
0
000000H-00FFFFH
64KB
ALL
1
X
0
0
0
NONE
NONE
NONE
NONE
1
0
0
0
1
0
00F000H-00FFFFH
4KB
Top Block
1
0
0
1
0
0
00E000H-00FFFFH
8KB
Top Block
1
0
0
1
1
0
00C000H-00FFFFH
16KB
Top Block
1
0
1
0
X
0
008000H-00FFFFH
32KB
Top Block
1
0
1
1
0
0
008000H-00FFFFH
32KB
Top Block
1
1
0
0
1
0
000000H-000FFFH
4KB
Bottom Block
1
1
0
1
0
0
000000H-001FFFH
8KB
Bottom Block
1
1
0
1
1
0
000000H-003FFFH
16KB
Bottom Block
1
1
1
0
X
0
000000H-007FFFH
32KB
Bottom Block
1
1
1
1
0
0
000000H-007FFFH
32KB
Bottom Block
1
X
1
1
1
0
000000H-00FFFFH
64KB
ALL
VER 1.1 9