ACE25C320G Datasheet, PDF (8/37 Pages) ACE Technology Co., LTD. – Uniform SECTOR Dual and Quad Serial Flash

ACE25C320G
Uniform SECTOR Dual and Quad Serial Flash
WIP bit
The Write In Progress (WIP) bit indicates whether the memory is busy in program/erase/write status
register progress. When WIP bit sets to 1, means the device is busy in program/erase/write status
register progress, when WIP bit sets 0, means the device is not in program/erase/write status register
progress.
WEL bit
The Write Enable Latch (WEL) bit indicates the status of the internal Write Enable Latch. When set to
1 the internal Write Enable Latch is set, when set to 0 the internal Write Enable Latch is reset and no
Write Status Register, Program or Erase command is accepted.
SEC, TB, BP2, BP1, BP0 bits
The Block Protect (SEC, TB, BP2, BP1, BP0) bits are non-volatile. They define the size of the area to
be software protected against Program and Erase commands. These bits are written with the Write
Status Register (WRSR) command. When the Block Protect (SEC, TB, BP2, BP1, BP0) bits are set to
1, the relevant memory area (as defined in Table1).becomes protected against Page Program (PP),
Sector Erase (SE) and Block Erase (BE) commands. The Block Protect (SEC, TB, BP2, BP1, BP0)
bits can be written provided that the Hardware Protected mode has not been set. The Chip Erase (CE)
command is executed, if the Block Protect (BP2, BP1, BP0) bits are “000” when CMP=0, or “110/111”
when CMP=1.
SRP1, SRP0 bits.
The Status Register Protect (SRP1 and SRP0) bits are non-volatile Read/Write bits in the status
register. The SRP bits control the method of write protection: software protection, hardware protection,
power supply lock-down or one time programmable protection.
SRP1 SRP0 #WP Status Register
Description
0
0
X
Software
Protected
The Status Register can be written to after a
Write Enable command, WEL=1.(Default)
0
1
0
Hardware
Protected
WP#=0, the Status Register locked and can not be written to
0
1
1
Hardware
WP#=1, the Status Register is unlocked and can be written
Unprotected
to after a Write Enable command, WEL=1
Power Supply Status Register is protected and can not be written to again
1
0
X
Lock- Down(1)
until the next Power-Down, Power-Up cycle
One Time
Status Register is permanently protected and can not be
1
1
X
Program (2)
written to
Note:
1. When SRP1, SRP0= (1, 0), a Power-Down, Power-Up cycle will change SRP1, SRP0 to (0, 0) state.
2. 2The One time Program feature is available upon special order. Please contact ACE for details.
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