ACE25C320G Datasheet, PDF (14/37 Pages) ACE Technology Co., LTD. – Uniform SECTOR Dual and Quad Serial Flash

ACE25C320G
Uniform SECTOR Dual and Quad Serial Flash
Figure6. Read Data Bytes Sequence Diagram
Read Data Bytes At Higher Speed (Fast Read) (0BH)
The Read Data Bytes at Higher Speed (Fast Read) command is for quickly reading data out. It is
followed by a 3- byte address (A23-A0) and a dummy byte, each bit being latched-in during the rising
edge of SCLK. Then the memory content, at that address, is shifted out on SO, each bit being shifted
out, at a Max frequency fC, during the falling edge of SCLK. The first byte addressed can be at any
location. The address is automatically incremented to the next higher address after each byte of data
is shifted out.
Figure7. Read Data Bytes at Higher Speed Sequence Diagram
Dual Output Fast Read (3BH)
The Dual Output Fast Read command is followed by 3-byte address (A23-A0) and a dummy byte,
each bit being latched in during the rising edge of SCLK, then the memory contents are shifted out
2-bit per clock cycle from SI and SO. The command sequence is shown in followed Figure8. The first
byte addressed can be at any location. The address is automatically incremented to the next higher
address after each byte of data is shifted out.
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