IC61C256AH Datasheet, PDF (5/9 Pages) Integrated Circuit Solution Inc – 32K x 8 HIGH-SPEED CMOS STATIC RAM

IC61C256AH
READ CYCLE SWITCHING CHARACTERISTICS⁽¹⁾ (Over Operating Range)
Symbol Parameter
-10
-12
-15
-20
-25
Min. Max. Min. Max. Min. Max. Min. Max. Min. Max.
Unit
tRC Read Cycle Time
10 — 12 — 15 — 20
—
25 —
ns
tAA Address Access Time
— 10 — 12 — 15 — 20
— 25
ns
tOHA Output Hold Time
tACE CE Access Time
tDOE OE Access Time
tLZOE⁽²⁾OE to Low-Z Output
tHZOE⁽²⁾OE to High-Z Output
tLZCE⁽²⁾CE to Low-Z Output
tHZCE⁽²⁾CE to High-Z Output
tPU⁽³⁾ CE to Power-Up
tPD⁽³⁾ CE to Power-Down
2 —2 — 2— 2
—
2—
ns
— 10 — 12 — 15 — 20
— 25
ns
— 5— 5 —7 —
8
—9
ns
0 —0 — 0— 0
—
0—
ns
— 5— 6 —7 —
9
— 10
ns
2 —3 — 3— 3
—
3—
ns
— 5— 7 —8 —
9
— 10
ns
0 —0 — 0— 0
—
0—
ns
— 10 — 12 — 15 — 18
— 20
ns
Notes:
1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V
and output loading specified in Figure 1.
2. Tested with the load in Figure 2. Transition is measured ±200 mV from steady-state voltage. Not 100% tested.
3. Not 100% tested.
AC TEST CONDITIONS
Parameter
Input Pulse Level
Input Rise and Fall Times
Input and Output Timing
and Reference Levels
Output Load
Unit
0V to 3.0V
3 ns
1.5V
See Figures 1 and 2
AC TEST LOADS
480 Ω
5V
480 Ω
5V
OUTPUT
30 pF
Including
jig and
scope
Figure 1.
255 Ω
OUTPUT
5 pF
Including
jig and
scope
255 Ω
Figure 2.
Integrated Circuit Solution Inc.
5
AHSR010-0D 4/19/2002