Z86L82 Datasheet, PDF (63/80 Pages) Maxim Integrated Products – 28-Pin Low-Voltage IR Microcontrollers

Z86L82/85/88
28-Pin Low-Voltage IR Microcontrollers
56
When more than one interrupt is pending, priorities are resolved by a programma-
ble priority encoder controlled by the Interrupt Priority register. An interrupt
machine cycle is activated when an interrupt request is granted. As a result, all
subsequent interrupt are disabled, and the Program Counter and Status Flags are
saved. The cycle then branches to the program memory vector location reserved
for that interrupt. All Z86L8X interrupts are vectored through locations in the pro-
gram memory. This memory location and the next byte contain the 16-bit address
of the interrupt service routine for that particular interrupt request. To accommo-
date polled interrupt systems, interrupt inputs are masked, and the Interrupt
Request register is polled to determine which of the interrupt requests require ser-
vice.
An interrupt resulting from AN1 is mapped into IRQ2, and an interrupt from AN2 is
mapped into IRQ0. Interrupts IRQ2 and IRQ0 can be rising, falling, or both edge
triggered; all are programmable by the user. The software can poll to identify the
state of the pin.
Programming bits for the Interrupt Edge Select are located in the IRQ Register
(R250), bits D7 and D6. The configuration is indicated in Table 22.
Table 22. IRQ Register *
IRQ
Interrupt Edge
D7
D6
IRQ2 (P31) IRQ0 (P32)
0
0
F
F
0
1
F
R
1
0
R
F
1
1
R/F
R/F
Notes:
F = Falling Edge
R = Rising Edge
*In stop mode, the comparators are turned off.
Clock
The Z86L8X on-chip oscillator has a high-gain, parallel-resonant amplifier for con-
nection to a crystal, LC, ceramic resonator, or any suitable external clock source
(XTAL1 = Input; XTAL2 = Output). The crystal must be AT cut, 1 MHz to 8 MHz
maximum, with a series resistance (RS) less than or equal to 100 Ohms. The
Z86LXX on-chip oscillator can be driven with a low-cost RC network or other suit-
able external clock source.
PS009007-1202