Z86C03 Datasheet, PDF (341/348 Pages) Zilog, Inc. – General-Purpose Register File. Flexible I/O. Analog Inputs

Z8 CPU
User Manual
323
Address modes R or IR can be used to specify a 4-bit Working Register. In
Note: _{this format, the source or destination Working Register operand is speci-}
fied by adding 1110b (Eh) to the high nibble of the operand. For example,
if Working Register R12 (CH) is the destination operand, then ECh will be
used as the destination operand in the Op Code.
E
src
or
E
dst
Example
If Working Register R3 contains 45h (01000101b) and Working Register
R7 contains the value 02h (00000010b) (bit 1 is being tested if it is 0),
the statement:
TM R3, R7
Op Code: 72 37
will set the Z Flag indicating bit 1 in the destination operand is 0. The V
and S flags are cleared.
Example
Working Register R14 contains the value F3h (11110011b), Working
Register R5 contains CBh, and Register CBh contains 88h (10001000b)
(bit 7 a bit 3 are being tested if they are 0), the statement:
TM R14, @R5
Op Code: 73 E5
will reset the Z Flag, because bit 7 iin the destination operand is not a 0.
The S flag will be set, and the V Flag is cleared.
Example
If Register D4h contains the value 08h (00001000b), and Working Reg-
ister R0 contains the value 04h (00000100b) (bit 2 is being tested if it is
0), the statement:
TM D4h, R0
Op Code: 74 E0 D4
UM001602-0904
Instruction Description