EZ80F915050MOD Datasheet, PDF (32/34 Pages) Zilog, Inc. – eZ80F91 Module compact, high-performance Ethernet module

eZ80F915050MOD
eZ80F91 Module Product Specification
26
D[0:7]
-WAIT
-BUSREQ
-NMI
TMS
TCK
TDI
-TRSTN
-RESET
-F91_WP
GND
C6
0.056µF
C5
220pF
R26
499
Y2
50MHz
R27
D0
39
D1
40
D2
41
D3
42
D4
43
D5
44
D6
45
D7
46
-WAIT ₅₄
-BUSREQ ₅₇
-NMI
56
TMS
66
TCK
67
TDI
69
-TRSTN ₇₁
-RESET ₅₅
-F91_WP ₁₄₄
CRS ₁₂₄
COL ₁₂₅
RXER ₁₃₅
RXDV ₁₃₇
RXD3 ₁₄₁
RXD2 ₁₄₀
RXD1 ₁₃₉
RXD0 ₁₃₈
RXCLK ₁₃₆
TXCLK ₁₃₁
83
U5
D0
D1
D2
D3
D4
D5
D6
D7
WAIT
BUSREQ
NMI
TMS
TCK
TDI
TRSTN
RESET
WP
MII_CRS
MII_COL
MII_RXER
MII_RXDV
MII_RXD3
MII_RXD2
MII_RXD1
MII_RXD0
MII_RXCLK
MII_TXCLK
FILT_IN
85 _XOUT
86 _XIN
L1
3.3µH
200K
C9
10pF
C8
5pF
C10
0.1µF
RTC_VDD
VCC
RTC_VDD
CR1
1N5817
VCC
R28
220
VL1
Y3
32.768KHz
R38 10M
C11
12pF
GND
C12
12pF
6
14
22
31
47
59
81
87
88
98
112
122
133
VDD
VDD
VDD
VDD
VDD
VDD
VDD
PLL_VDD
VDD
VDD
VDD
VDD
VDD
7
15
23
32
38
48
60
64
72
82
84
89
99
108
113
123
134
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
PLL_VSS
VSS
VSS
VSS
VSS
VSS
VSS
63
62
61
RTC_VDD
RTC_XOUT
RTC_XIN
EZ80F91
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
1
2
3
4
5
8
9
10
11
12
13
16
17
18
19
20
21
24
25
26
27
28
29
30
MII_TXD3
MII_TXD2
MII_TXD1
MII_TXD0
MII_TXEN
MII_TXER
MII_MDC
MII_MDIO
126
127
128
129
130
132
142
143
IORQ
MRQ
RD
WR
BUSACK
CS0
CS1
CS2
CS3
49
50
51
52
58
33
34
35
36
SCL
SDA
110
109
PA7_PWM3
PA6_PWM2_EC1
PA5_PWM1_TOUT1
PA4_PWM0_TOUT0
PA3_PWM3_OC3
PA2_PWM2_OC2
PA1_PWM1_OC1
PA0_PWM0_OC0
121
120
119
118
117
116
115
114
PB7_MOSI
PB6_MISO
PB4_ICB3
PB4_ICA3
PB3_SCK
PB2_SS
PB0_IC1
PB0_IC0_EC0
107
106
105
104
103
102
101
100
PC7_RI1
PC6_DCD1
PC5_DSR1
PC4_DTR1
PC3_CTS1
PC2_RTS1
PC1_RXD1
PC0_TXD1
97
96
95
94
93
92
91
90
PD7_RI0
PD6_DCD0
PD5_DSR0
PD4_DTR0
PD3_CTS0
PD2_RTS0
PD1_RXD0_IRRXD
PD0_TXD0_IRTXD
80
79
78
77
76
75
74
73
HALT_SLP
PHI
INSTRD
TDO
TRIGOUT
65
111
53
70
68
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
TXD3
TXD2
TXD1
TXD0
TXEN
TXER
MDC
MDI0
-IORQ
-MREQ
-RD
-WR
-CS0
-CS1
-CS2
-CS3
SCL
SDA
PA7
PA6
PA5
PA4
PA3
PA2
PA1
PA0
PB7
PB6
PB5
PB4
PB3
PB2
PB1
PB0
PC7
PC6
PC5
PC4
PC3
PC2
PC1
PC0
PD7
PD6
PD5
PD4
PD3
PD2
PD1
PD0
A[0:23]
VCC
R18 _10K
R22 1K
GND
-RESET
-IORQ
-MREQ
-RD
-WR
-BUSACK
-CS0
-CS1
-CS2
-CS3
IICSCL
IICSDA
MDI0
MDC
RXCLK
RXD3
RXD2
RXD1
RXD0
RXDV
RXER
TXCLK
TXD3
TXD2
TXD1
TXD0
TXEN
TXER
COL
CRS
U6
1
2
3
5
7
8
9
14
15
16
17
18
19
20
PCSB
ISODEF
ISO
REFCLK
BURN_IN
RST
PWRDN
PHYAD4_0RXD-
PHYAD3_10RXD+
PHYAD2_10TXD++
PHYAD1_10TXD-
PHYAD0_10TXD--
GPIO0_10TXD--
GPIO1_TP125
21
22
30
MDIO
MDC
RXCLK
23
24
25
26
RXD3
RXD2
RXD1
RXD0
29
31
33
RXDV
RXER_RXD4
TXCLK_PCSBPCLK
40
39
38
37
TXD3
TXD2
TXD1
TXD0
34
32
41
42
TXEN
TXER_TXD4
COL
CRS
AM79C874
PA[0:7]
PB[0:7]
C44
0.1µF
C45
0.1µF
C46
0.1µF
C47
0.1µF
C49
0.1µF
C50
0.1µF
GND
C51
0.1µF
C52
0.1µF
Put caps between pairs of U6, 10:11, 51:52, 59:65
and 71:73 as close to the pins as possible
C48
0.1µF
VCC
C53
0.1µF
VCC
INTR
TECH_SEL2
TECH_SEL1
TECH_SEL0
ANEGA
43
53
54
55
56
IBREF ⁷²
RPTR ⁶¹
LEDSPD0_LEDBTA_FXSEL ⁴⁴
LECOL_SCRAMEN ⁴⁵
LEDRX_LEDSEL ⁴⁶
LEDTX_LEDBTB ⁴⁷
LEDLNK_LED_10LNK ⁴⁸
LESPD1_LEDTXA_CLK25EN ⁵⁷
LEDDPX_LEDTXB ⁵⁸
TEST3_SDI+
TEST2
TEST1_FXR+
TEST0_FXR-
FXT+
FXT-
XTL-
XTL+
TX+
TX-
62
68
67
66
69
70
74
75
77
78
RX+
RX-
64
63
R21 0
R24 0
-LEDRX
-LEDLNK
R13 R14 R15
10K 10K 10K
R19 0
R23 ₀
GND
R16 R17
10K
10K 0.1%
R25 10K
C4 _18pF
Y1
25 MHz C7 _18pF
GND
VCC
C17
0.1µF
GND
VCC
R34
330
R11 _49.9
R32
49.9
R31 49.9
R35
330
R33 49.9
C15
0.1µF
C16
0.1µF
-LEDRX
-LEDLNK
P2
1
4
2
TX+
TXCT
TX-
3
5
6
RX+
RXCT
RX-
8 _GND
9
10
11
12
AN1
CT1
AN2
CT2
HFJ11-2450E-L11
VCC
PC[0:7]
PD[0:7]
-HALT_SLP
CLK_OUT
-INSTRD
TDO
TRIGOUT
C31
0.001µF
C18
0.1µF
C32
0.001µF
C19
0.1µF
C33
0.001µF
C20
0.1µF
C34
0.001µF
C21
0.1µF
C35
0.001µF
C22
0.1µF
C36
0.001µF
C23
0.1µF
C37
0.001µF
C24
0.1µF
C38
0.001µF
C25
0.1µF
C39
0.001µF
C26
0.1µF
C40
0.001µF
C27
0.1µF
C41
0.001µF
C28
0.1µF
C42
0.001µF
C43
0.001µF
GND
C29
0.1µF
C30
0.1µF
VCC
VCC
VCC
GND
VCC
GND
GND
Figure 9. eZ80F91 Module Schematic Diagram, #2 of 3—CPU and PHY
PS019310-0904
PRELIMINARY
Schematics