Z84C90 Datasheet, PDF (20/31 Pages) Zilog, Inc. – KIO Serial/Parallel Counter Timer

Z84C90
KIO Serial/Parallel Counter Timer
15
AC Characteristics
Table 5. AC Characteristics of the Z84C90
No. Symbol
Parameter
Bus Interface Timing
1 TcC
Clock Cycle Time
2 TwCh
Clock Pulse Width (High)
3 TwCl
Clock Pulse Width (Low)
4 TfC
Clock Fall Time
5 TrC
Clock Rise Time
6 TsA(Rlf)
Address, CS Setup to RD, IORQ
Fall
7 TsRl(Cr)
RD, IORQ to Clock Rise Setup
8 Th
Hold Time for Specified Setup
9 TdCr(DO)
CLOCK Rise to Data Out Delay
10 TdRlr(DOz)
RD, IORQ Rise to Data Out Float
Delay
11 ThRDr(D)
M1,RD,IORQ Rise to Data Float
12 TsD(Cr)
Data in to Clock Rise Setup
13 TdIOI(DO)
IORQ Fall to Data Out Delay
(INTACK Cycle)²
14 ThIOr(D)
IORQ Rise to Data Float (INTACK)
15 THIOr(A)
IORQ Rise to Address Hold
16 TsM1f(Cr)
M1 Fall to Clock Rise Setup
17 TsM1r(Cf)
M1 Rise to Clock Fall Setup
(M1 Cycle)
18 TdM1f(IEOf)
19 TsIEI(IOf)
M1 Fall to IEO Fall Delay (Interrupt
Immediately preceding M1 Fall)³
IEI to IORQ Fall Setup³
20 TdIEIf(IEOf) IEI Fall to IEO Fall Delay³
21 TdIEIf(IEOr) IEI Rise to IEO Rise Delay
(after ED Decode)³
8MHz
Min Max
125 DC
55 DC
55 DC
10
10
50
50
15
100
75
15
30
95
15
15
40
-15
•
•
160
160
10MHz¹
12MHz
Min Max Min Max U/M
100 DC 80 DC ns
42 DC 32 DC ns
42 DC 32 DC ns
10
10 ns
10
10 ns
40
30
ns
50
40
ns
15
15
ns
80
65 ns
60
55 ns
15
15
ns
25
22
ns
95
95 ns
15
15
ns
15
15
ns
40
40
ns
-15
15
ns
•
• ns
•
• ns
150
125 ns
150
125 ns
PS011802-0902