Z8018X Datasheet, PDF (195/326 Pages) Zilog, Inc. – Family MPU

Z 8018x Fam ily
M PU Us e r M anual
180
Addressing Modes
The Z80180 instruction set includes eight addressing modes.
• Implied Register
• Register Direct
• Register Indirect
• Indexed
• Extended
• Immediate
• Relative
• IO
Implied Register (IMP)
Certain Op Codes automatically imply register usage, such as the
arithmetic operations that inherently reference the Accumulator, Index
Registers, Stack Pointer, and General Purpose Registers.
Register Direct (REG)
Many Op Codes contain bit fields specifying registers used for operation.
The exact bit field definitions vary depending on instruction depicted in
Figure 75.
UM005001-ZMP0400