Z89165 Datasheet, PDF (15/22 Pages) Zilog, Inc. – DTAD CONTROLLERS

ZILOG
AC CHARACTERISTICS
Z89167/168/169
External I/O or Memory Read and Write Timing Table
No Symbol Parameter
V
CC
Note [4]
1 TdA(AS) Address Valid to /AS Rise Delay
5.0V
2 TdAS(A) /AS Rise to Address Float Delay
5.0V
3 TdAS(DR) /AS Rise to Read Data Req’d Valid
5.0V
4 TwAS
/AS Low Width
5.0V
5 TdAZ(DS) Address Float to /DS Fall
5.0V
6 TwDSR
/DS (Read) Low Width
5.0V
7 TwDSW /DS (Write) Low Width
5.0V
8 TdDSR(DR) /DS Fall to Read Data Req’d Valid
5.0V
9 ThDR(DS) Read Data to /DS Rise Hold Time
5.0V
10 TdDS(A) /DS Rise to Address Active Delay
5.0V
11 TdDS(AS) /DS Rise to /AS Fall Delay
5.0V
12 TdR/W(AS) R//W Valid to /AS Rise Delay
5.0V
13 TdDS(R/W) /DS Rise to R//W Not Valid
5.0V
14 TdDW(DSW) Write Data Valid to /DS Fall (Write) Delay 5.0V
15 TdDS(DW) /DS Rise to Write Data Not Valid Delay
5.0V
16 TdA(DR) Address Valid to Read Data Req’d Valid
5.0V
17 TdAS(DS) /AS Rise to /DS Fall Delay
5.0V
18 TdDI(DS) Data Input Setup to /DS Rise
5.0V
19 TdDM(AS) /DM Valid to /AS Fall Delay
5.0V
Notes:
[1] When using extended memory timing add 2 TpC.
[2] Timing numbers given are for minimum TpC.
[3] See clock cycle dependent characteristics table.
[4] 5.0 V ± 0.5 V.
Standard Test Load
All timing references use 0.9 V_CC for a logic 1 and 0.1 V_CC for a logic 0.
T_A=0°C to +70°C
Min
Max
18
22
130
28
0
90
62
55
0
36
25
18
22
18
23
160
32
28
18
Z89165/166/167/168/169
DTAD CONTROLLERS
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Notes
[2,3]
[2,3]
[1,2,3]
[2,3]
[1,2,3]
[1,2,3]
[1,2,3]
[2,3]
[2,3]
[2,3]
[2,3]
[2,3]
[2,3]
[2,3]
[1,2,3]
[2,3]
[1,2,3]
[2,3]
CP96TAD0103
15