Z8F083A0128ZCOG Datasheet, PDF (12/14 Pages) Zilog, Inc. – Up to 8 KB Flash memory with in-circuit programming capability

Z8 Encore!^® F083A Series Development Kit
User Manual
9
J1
2
3
1
PWR JACK
D
GND
C
GND
B
A
5
4
F1
RXE050
R23
10K
SENSE
R24
15K
5V
C4
0.1uF
+ C3
100/10
VCC
U7
5 _VIN
OUT ¹
-Z_RST
2
4
SENSE
SHDN
LT1129-3.3/DD
C8
0.1uF
+ C7
100/10
VCC_33V _{VCC_33V}
R1
680
D1
LED ^{3.3 OK}
U3B
74LVC04/SO
3
4
U3C
74LVC04/SO
5
6
U3E
74LVC04/SO
11
10
U3F
74LVC04/SO
13
12
5
GND
TP1
TP2
GND
4
VCC_33V
3
2
VCC_33V
VCC_33V
R2
10K
-DIS_232
PA5_TXD0
PA3_CTS0
PA4_RXD0
C2
0.1uF
C6
0.1uF
PA5_TXD0
GND
U1
2 _C1+
4 _C1-
5 _C2+
6 _C2-
13 _T1IN
12 _T2IN
PA3_CTS0
PA4_RXD0
15 _R1OUT
10 _R2OUT
1 _EN
20 _SHDN
MAX3222
V+ ³
V- ⁷
T1OUT ¹⁷
T2OUT ⁸
R1IN ¹⁶
R2IN ⁹
NC
NC
14
11
GND
U3A
74LVC04/SO
1
2
JP3
1
2
GND
DIS RS232
1
C1
0.1uF
GND
CONSOLE
P1
1
C5
6
0.1uF
TXD0
2
CTS0
7
D
RXD0
3
8
4
9
5
DB9 Female
USER
C
VCC_33V
GND
3
VCC_33V
-DIS_IRDA
JP4
1
2
DIS IRDA
R5
10K
9
U3D
74LVC04/SO
8
GND
R3
C9
68
R4
330nF
B
U4
2R7
5 _VCC
PA5_TXD0
IRDA_SD
PA4_RXD0
1 _LEDA
2 _TXD
4 _SD
3 _RXD
6 _GND
ZHX1810
DBG
INTERFACE
P2
1
2
3
4
5
6
Header 3x2
R6
10K
-Z_RST
DBG
DBG
2
A
Title
XP 4K MDS Processor Module. Schematic.
Size Document Number
B
96C0941-001
Date:
Wednesday, March 12, 2008
Sheet
1
3
of
Rev
D
3
UM020604-0508
Figure 3. Schematic, Z8 Encore!^® F083A Series MCU Development Board