Z86L33 Datasheet, PDF (11/16 Pages) Zilog, Inc. – CMOS Z8 CONSUMER CONTROLLER PROCESSOR

Z86L33/L43
CP96LVO1501
AC CHARACTERISTICS
External I/O or Memory Read and Write Timing Table (L43 Only)
(SCLK/TCLK = XTAL/2)
No Symbol Parameter
T_A=–0°C to 70°C
Note [3] 8 MHz
V
Min Max
CC
Units Notes
1 TdA(AS) Address Valid to /AS Rise Delay
2 TdAS(A) /AS Rise to Address Float Delay
2.0 35
3.9 35
2.0 45
3.9 45
ns [2]
ns [2]
ns
3 TdAS(DR) /AS Rise to Read Data Req’d Valid
4 TwAS /AS Low Width
2.0
250
3.9
250
2.0 55
3.9 55
ns [1,2]
ns
ns [2]
ns
5 TdAS(DS) Address Float to /DS Fall
6 TwDSR /DS (Read) Low Width
2.0 0
3.9 0
2.0 200
3.9 200
ns
ns
ns [1,2]
ns
7 TwDSW /DS (Write) Low Width
8 TdDSR(DR) /DS Fall to Read Data Req’d Valid
2.0 110
3.9 110
2.0
150
3.9
150
ns [1,2]
ns
ns [1,2]
ns
9 ThDR(DS) Read Data to /DS Rise Hold Time
10 TdDS(A) /DS Rise to Address Active Delay
2.0 0
3.9 0
2.0 45
3.9 55
ns [2]
ns
ns [2]
ns
11 TdDS(AS) /DS Rise to /AS Fall Delay
12 TdR/W(AS) R//W Valid to /AS Rise Delay
2.0 30
3.9 45
2.0 45
3.9 45
ns [2]
ns
ns [2]
ns
13 TdDS(R/W) /DS Rise to R//W Not Valid
2.0 45
3.9 45
14 TdDW(DSW) Write Data Valid to /DS Fall (Write) Delay 2.0 55
3.9 55
ns [2]
ns
ns [2]
ns
15 TdDS(DW) /DS Rise to Write Data Not Valid Delay 2.0 45
3.9 45
16 TdA(DR) Address Valid to Read Data Req’d Valid 2.0
310
3.9
310
ns [2]
ns
ns [1,2]
ns
17 TdAS(DS) /AS Rise to /DS Fall Delay
2.0 65
3.9 65
18 TdDM(AS) /DM Valid to /AS Rise Delay
2.0 35
3.9 35
19 TdDS(DM) /DS Rise to DM Valid Delay
45
45
20 ThDS(AS) /DS Valid to Address Valid Hold Time
45
45
ns [2]
ns
ns [2]
ns
ns
ns
ns
ns
Notes:
[1] When using extended memory timing add 2 TpC.
[2] Timing numbers given are for minimum TpC.
[3] V_CC = 2.0V to 3.9V.
Standard Test Load
All timing references use 0.7 V for a logic 1 and 0.2 V for a logic 0.
CC
CC
11