ZL50022_06 Datasheet, PDF (84/121 Pages) Zarlink Semiconductor Inc – Enhanced 4 K Digital Switch with Stratum 4E DPLL

ZL50022
Data Sheet
External Read/Write Address: 0300_H - 031F_H
Reset Value: 0000_H
15
14
13
12
11
10
9
0
0
0
0
0
0
0
8
7
6
5
4
3
2
1
0
0
ST[n] ST[n] ST[n] ST[n] ST[n] ST[n] ST[n] ST[n]
BRS7 BRS6 BRS5 BRS4 BRS3 BRS2 BRS1 BRS0
Bit
Name
Description
15 - 8
Unused
Reserved
In normal functional mode, these bits MUST be set to zero.
7-0
ST[n]
BRS7 - 0
Stream[n] BER Receive Start Bits
The binary value of these bits refers to the input channel in which the BER data starts
to be compared.
Note: [n] denotes input stream from 0 - 31.
Table 48 - BER Receiver Start Register [n] (BRSR[n]) Bits
External Read/Write Address: 0320_H - 033F_H
Reset Value: 0000_H
15
14
13
12
11
10
9
0
0
0
0
0
0
0
8
ST[n]
BL8
7
ST[n]
BL7
6
ST[n]
BL6
5
ST[n]
BL5
4
ST[n]
BL4
3
ST[n]
BL3
2
ST[n]
BL2
1
ST[n]
BL1
0
ST[n]
BL0
Bit
Name
Description
15 - 9
Unused
Reserved
In normal functional mode, these bits MUST be set to zero.
8-0
ST[n]
BL8 - 0
Stream[n] BER Length Bits
The binary value of these bits refers to the number of consecutive channels expected
to receive the BER pattern. The maximum number of BER channels is 32, 64, 128 and
256 for the data rates of 2.048 Mbps, 4.096 Mbps, 8.192 Mbps and 16.384 Mbps
respectively. The minimum number of BER channels is 1. If these bits are set to zero,
no BER test will be performed.
Note: [n] denotes input stream from 0 - 31.
Table 49 - BER Receiver Length Register [n] (BRLR[n]) Bits
84
Zarlink Semiconductor Inc.