SP5610 Datasheet, PDF (3/15 Pages) Zarlink Semiconductor Inc – 1.3GHz BI-DIRECTIONAL I2C BUS CONTROLLED SYNTHESISER

FEBRUARY 1997
ADVANCE INFORMATION
D.S. 3920 3.3
SP5610
1.3GHz BI–DIRECTIONAL I²C BUS CONTROLLED SYNTHESISER
(Supersedes edition in 1996 Media IC Handbook, HB4599–1.0)
The SP5610 is a single chip frequency synthesiser
designed for TV tuning systems. Control data is entered in the
standard I²C BUS format. The device contains 1 addressable
current limited output and 4 addressable bi–directional open
collector ports one of which is a 3 bit ADC. The information on
these ports can be read via the I²C BUS. The device has one
fixed I²C BUS address and 3 programmable addresses,
programmed by applying a specific input voltage to the P3
current limited output. This enables 2 or more synthesisers to
be used in a system.
FEATURES
J Complete 1.3GHz Single chip System
J High Sensitivity RF Inputs
J Programmable via I²C Bus
J On Chip oscillator with 1kW negative resistance
J Low power consumption (5V, 20mA)
J Low Radiation
J Phase Lock Detector
J Varactor Drive Amp Disable
J 5 Controllable Outputs
J 5 Level ADC
J Variable I²C BUS Address For Multi Tuner
Applications
J ESD Protection *
J Switchable 512/1024 Reference Divider
J Pin and Function Compatible with SP5510S [
* Normal ESD handling procedures should be observed.
[ The SP5510S does not have a switchable
reference division ratio.
APPLICATIONS
J Satellite TV when combined with SP4902 2.5GHz
prescaler
J Cable Tuning Systems
J VCR’s
CHARGE PUMP
CRYSTAL Q1
CRYSTAL Q2
SDA
SCL
[ I/O PORT P7
* I/O PORT P6
[ I/O PORT P5
1
16
2
15
3
14
4
13
5
12
6
11
7
10
8
9
DRIVE OUTPUT
V EE
RF INPUT
RF INPUT
V CC
NC
P3 OUTPUT PORT/
ADD SELECT
I/O PORT P4 [
MP16
[ = Logic level I/O
* = 3–bit ADC input
Fig. 1 Pin connections – top view
ORDERING INFORMATION
SP5610S/KG/MPAS (Tubes)
SP5610S/KG/MPAD (Tape and Reel)