MA3864 Datasheet, PDF (3/11 Pages) Zarlink Semiconductor Inc – RADIATION HARD 8192 x 8 BIT MASK-PROGRAMMABLE ROM

MA3864
SIGNAL DEFINITIONS
A0-12
Address input pins which select a particular eight bit word within
the memory array.
Q0-7
Data output pins
E1, E2, E3, E4
Are mask programmed, to the customer’s specification, to form
the active LOW chip select function (E). E is driven by a 4-input
NAND gate which has E1,E2,E3,E4 or their inverses as it’s
inputs. Unused NAND gate I/Ps will be tied high internally. When
chip select (E) is low, a read is activated. When it is at a high level
it defaults the ROM to a precharge condition and holds the data
output drivers in a high impedance state.
G
Output Enable which when at a high level holds the data output
drivers in a high impedance state. When at a low level, data
output driver state is defined by CS. If this signal is not used it
must be connected to VSS.
CHARACTERISTICS AND RATINGS
Symbol
V_CC
V_I
T_A
T_S
Parameter
Supply Voltage
Input Voltage
Operating Temperature
Storage Temperature
Min.
-0.5
-0.3
-55
-65
Max.
7.0
V_DD+0.3
125
150
Units
V
V
°C
°C
Figure 3: Absolute Maximum Ratings
Stresses above those listed may cause permanent
damage to the device. This is a stress rating only and
functlonal operation of the device at these condltions,
or at any other condition above those indicated in the
operations section of this specification, is not implied
Exposure to absolute maxlmum rating conditions for
extended periods may affect device reliability.
Notes for Table 4:
Characteristics apply to pre radiation at T_A = -55°C to +125°C with V_DD = 5V ±10% and to post 100k Rad(Si) total dose
radiation at T_A = 25°C with V_DD = 5V ±10% (characteristics at higher radiation levels available on request). GROUP A
SUBGROUPS 1, 2, 3.
Symbol Parameter
Conditions
(Option) Min.
Typ.
Max. Units
V_DD Supply voltage
-
4.5
5.0
5.5
V
V_lH Logical ‘1’ Input Voltage
-
(TTL)
2.0
-
(CMOS) 0.8 V_DD
-
V_DD
V
V_DD
V
V_lL Logical ‘0’ Input Voltage
-
(TTL)
V_SS
(CMOS)
V_SS
-
0.8
V
-
0.2 V_DD V
V_OH1 Logical ‘1’ Output Voltage
I_OH1 = -4mA
2.4
-
-
V
V_OH2 Logical ‘1’ Output Voltage
I_OH2 = -3mA
V_DD -0.5
-
-
V
V_OL Logical ‘0’ Output Voltage
I_OL = 8mA
-
-
0.4
V
I_LI
Input Leakage Current
V_IN = V_DD or V_SS all inputs
-
-
±10
µA
I_LO
Output Leakage Current
Chip disabled, V_OUT = V_DD or V_SS
-
-
±10
µA
I_SB1 Selected Static Current (CMOS) All inputs = V_DD -0.2V
except CS = V_SS +0.2V
-
0.1
2
mA
I_DD Dynamic Operating Current
(CMOS)
f_RC = 1MHz, all inputs
switching, V_IH = V_DD -0.2V
-
3
10
mA
I_SB2 Standby Supply Current
CS = V_DD -0.2V
-
0.1
2
mA
Figure 4: Electrical Characteristics
2