MT9076B Datasheet, PDF (22/172 Pages) Zarlink Semiconductor Inc – T1/E1/J1 3.3 V Single Chip Transceiver

MT9076B
Data Sheet
1.0 MT9076 Line Interface Unit (LIU)
1.1 Receiver
The receiver portion of the MT9076 LIU consists of an input signal peak detector, an optional equalizer with
separate high pass sections, a smoothing filter, data and clock slicers and a clock extractor. Receive equalization
gain can be set manually (i.e., software) or it can be determined automatically by peak detectors.
The output of the receive equalizer is conditioned by a smoothing filter and is passed on to the clock and data slicer.
The clock slicer output signal drives a phase locked loop, which generates an extracted clock (Exclk). This
extracted clock is used to sample the output of the data comparator.
In T1 mode, the receiver portion of the LIU can recover clock and data from the line signal for loop lengths of 0 -
6000 ft. of 22 AWG cable and tolerate jitter to the maximum specified by AT&T TR 62411(Figure 3).
The LOS output pin function is selectable to indicate any combination of loss of signal and/or loss of basic frame
synchronization condition.
The LLOS (Loss of Signal) status bit indicates when the receive signal level is lower than the analog threshold for at
least 1 millisecond, or when the number of consecutive received zeros exceeds the digital loss threshold.
In E1 mode, the analog threshold is either of -20 dB or -40 dB. The digital loss threshold is either 32 or 192.
In T1 mode, the receive LIU circuit requires a terminating resistor of 100 Ω across the device side of the receive 1:1
transformer.
In E1 mode, the receive LIU circuit requires a terminating resistor of either 120 Ω or 75 Ω across the device side of
the receive 1:1 transformer.
The jitter tolerance of the clock extractor circuit exceeds the requirements of TR 62411 in T1 mode (see Figure 3)
and G.823 in E1 mode (see Figure 4).
Peak to Peak
Jitter Amplitude
(log scale)
138UI
100UI
28UI
10UI
1.0UI
0.4UI
0.1 Hz 1.0 Hz
10 Hz
4.9 Hz
Jitter Frequency
(log scale)
100 Hz 1.0 kHz 10 kHz 10 0kHz
Figure 3 - Input Jitter Tolerance as Recommended by TR-62411 (T1)
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Zarlink Semiconductor Inc.