ZL50011_06 Datasheet, PDF (2/83 Pages) Zarlink Semiconductor Inc – Flexible 512 Channel DX with on-chip DPLL

ZL50011
Data Sheet
Applications
• Small and medium digital switching platforms
• Access Servers
• Time Division Multiplexers
• Computer Telephony Integration
• Digital Loop Carriers
Description
The device has 16 ST-BUS inputs (STi0-15) and 16 ST-BUS outputs (STo0-15). It is a non-blocking digital switch
with 512 64 kbps channels and performs rate conversion between the ST-BUS inputs and ST-BUS outputs. The
ST-BUS inputs accept serial input data streams with the data rate of 2.048 Mbps, 4.096 Mbps or 8.192 Mbps on a
per-stream basis. The ST-BUS outputs deliver serial output data streams with the data rate of 2.048 Mbps,
4.096 Mbps or 8.192 Mbps on a per-stream basis. The device also provides 16 high impedance control outputs
(STOHZ 0-15) to support the use of external high impedance control buffers.
The ZL50011 has features that are programmable on a per-stream or per-channel basis including message mode,
input bit delay, output bit advancement, constant throughput delay and high impedance output control.
The on-chip DPLL meets Telcordia GR-1244-CORE stratum 4 specifications (Stratum 4). It accepts a dedicated
timing reference input at either 8 kHz, 1.544 MHz or 2.048 MHz. Alternatively, the reference can be replaced by an
internal 8 kHz signal derived from the ST-BUS input frame boundary. The DPLL provides reference monitor, jitter
attenuation and free run functions. It can be used as a system’s ST-BUS timing source which is synchronized to the
network. The DPLL can also be bypassed so that the device operates under system timing.
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Zarlink Semiconductor Inc.