YSS915 Datasheet, PDF (10/32 Pages) YAMAHA CORPORATION – Karaoke Processor 2 for Video disc player

YSS915
5. Microcomputer interface /CS, /SCK, CDI, CDO, DEPI
These are 8 bit serial interface for writing data into or reading data from internal registers of this device.
Do not write or read data into or from this device in 200 msec from the initial clear moment (rise moment of /IC).
-1) Writing data
Set the address of an internal register into the first byte, and data into the second byte.
Use the following format.
-2) Reading data (only in KP2V extended mode)
For reading data, only MLR register ($10) is provided.
Use the following format.
-3) DEPI
When DEPI is "H", de-emphasis is enabled regardless of the state of internal register.
When DEPI is "L", setting of OPR register ($00) is valid.
6. Others
P0 ,ZERO
-1) P0
P0 pin outputs the value of the register PHC[0]($08). This value is outputted when OPR($00) has been set after the
initial clear. This pin is in High-impedance state until OPR($00) is set.
This function is valid when MDR[0]($1C) is ‘H’. When MDR[0]($1C) is ‘L’, this pin always outputs ‘L’ like
YSS903 does.
-2) ZERO
When both of the digital audio outputs, L and R, have been “zero(0)” for the period equivalent to 511 samplings, the zero
level detection function activates to make ZERO pin output ‘L’ . In other period, this pin is in ‘H’ state.
This value is outputted when OPR($00) has been set after the initial clear. This pin is in HZ state until OPR($00) is set.
This function is valid when MDR[1]($1C) is ‘H’. When MDR[1]($1C) is ‘L’, this pin always outputs ‘L’ like
YSS903 does.
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