English
Language : 

AC0402BRNPO5BN Datasheet, PDF (20/24 Pages) YAGEO Corporation – SURFACE MOUNT MULTILAYER CERAMIC CAPACITORS
Product specification 20
Surface-Mount Ceramic Multilayer Capacitors Automotive grade NP0/X7R 6.3 V to 630 V
24
TEST
Resistance to
Soldering Heat
Thermal Shock
TEST METHOD
AEC-Q200 15
AEC-Q200 16
PROCEDURE
Precondition: 150 +0/–10 °C for 1 hour, then keep for 24 ± 1
hours at room temperature
Preheating: for size ≤ 1206: 120 °C to 150 °C for 1 minute
Preheating: for size >1206: 100 °C to 120 °C for 1 minute
and 170 °C to 200 °C for 1 minute
Solder bath temperature: 260 ± 5 °C
Dipping time: 10 ± 0.5 seconds
Recovery time: 24 ± 2 hours
1. Preconditioning, class 2 only:
150 +0/-10 °C /1 hour, then keep for 24 ± 1 hour at room
temp
2. Initial measure:
Spec: refer to initial spec C, D, IR
3. Rapid change of temperature test:
NP0/X7R: -55 °C to +125 °C; 300 cycles
15 minutes at lower category temperature; 15 minutes at
upper category temperature.
4. Recovery time:
Class1: 6 to 24 hours
Class2: 24 ± 2 hours
5. Final measure: C, D, IR
REQUIREMENTS
Dissolution of the end face
plating shall not exceed 25% of
the length of the edge
concerned
∆C/C
Class1:
NP0: Within ± 1% or 0.5 pF,
whichever is greater.
Class2:
X7R: ± 10%
D.F. within initial specified
value
IR within initial specified value
No visual damage
∆C/C
NP0: Within ± 1% or 1 pF,
whichever is greater
X7R: ± 15%
D.F: meet initial specified value
IR meet initial specified value
ESD
AEC-Q200 17 Per AEC-Q200-004
Solderability
AEC-Q200 18
Preheated to a temperature of 80 °C to 140 °C and
maintained for 30 seconds to 60 seconds.
Test conditions for lead containing solder alloy
Temperature: 235 ± 5 °C
Dipping time: 2 ± 0.2 seconds
Depth of immersion: 10 mm
Alloy Composition: 60/40 Sn/Pb
Number of immersions: 1
Test conditions for lead-free containing solder alloy
Temperature: 245 ± 5 °C
Dipping time: 3 ± 0.3 seconds
Depth of immersion: 10 mm
Alloy Composition: SAC305
Number of immersions: 1
A component passes a voltage
level if all components stressed
at that voltage level pass.
The solder should cover over
95% of the critical area of each
termination.
Mar. 31, 2017 V.6
www.yageo.com