DS589 Datasheet, PDF (6/6 Pages) Xilinx, Inc – Virtex-5 FPGA CRC Wizard v1.3

Virtex-5 FPGA CRC Wizard v1.3
Revision History
Date
11/30/06
05/17/07
10/10/07
03/24/08
03/24/08
Version
1.1
1.2
1.3
1.4
1.4.1
Revision
Initial Xilinx release.
LogiCORE CRC Wizard v1.1 release.
Updated Table 1, Table 2 and Table 3.
LogiCORE CRC Wizard 1.2 release. Corrected core parameters in Figure 2 and
Table 1. Removed TX and RX from port names in Figure 3 and Figure 4. Updated
LUT and FF resources used in Table 2 and Table 3.
LogiCORE CRC Wizard v1.3 release. Added FXT device. Updated utilization
numbers in Table 2 and Table 3.
Minor non-technical edits.
Notice of Disclaimer
Xilinx is providing this design, code, or information (collectively, the “Information”) to you “AS-IS” with no
warranty of any kind, express or implied. Xilinx makes no representation that the Information, or any particular
implementation thereof, is free from any claims of infringement. You are responsible for obtaining any rights you
may require for any implementation based on the Information. All specifications are subject to change without
notice. XILINX EXPRESSLY DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
ADEQUACY OF THE INFORMATION OR ANY IMPLEMENTATION BASED THEREON, INCLUDING BUT
NOT LIMITED TO ANY WARRANTIES OR REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE
FROM CLAIMS OF INFRINGEMENT AND ANY IMPLIED WARRANTIES OF MERCHANTABILITY OR
FITNESS FOR A PARTICULAR PURPOSE. Except as stated herein, none of the Information may be copied,
reproduced, distributed, republished, downloaded, displayed, posted, or transmitted in any form or by any means
including, but not limited to, electronic, mechanical, photocopying, recording, or otherwise, without the prior
written consent of Xilinx.
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www.xilinx.com
DS589 March 24, 2008
Product Specification