DS589 Datasheet, PDF (1/6 Pages) Xilinx, Inc – Virtex-5 FPGA CRC Wizard v1.3

Virtex-5 FPGA CRC Wizard v1.3
DS589 March 24, 2008
Product Specification
Introduction
The LogiCORE™ IP Cyclic Redundancy Check (CRC)
Wizard provides a LocalLink wrapper for the CRC
integrated block available in the Virtex™-5 LXT, SXT,
and FXT platforms. The CRC Wizard can be
customized to suit a wide variety of requirements.
CRC is an error checking mechanism for a block of data,
such as a frame of network traffic. CRCs are popular
because they are simple to implement in digital
hardware, are easy to analyze mathematically, and are
particularly good at detecting common errors caused
by noise in transmission channels.
Features
• LocalLink wrapper for simple user interface
• Instantiates CRC blocks on the Virtex-5
LXT/SXT/FXT platforms
• Uses CRC32 polynomial
• Two 32-bit input CRC blocks (CRC32) can be
combined into one 64-bit input CRC block (CRC64)
• Easy-to-use framing user interface
• Supports variable REM feature
• Options to complement/transpose user data or
CRC
LogiCORE IP Facts
Core Specifics
Supported Device
Family ⁽¹⁾
Virtex-5 LXT/SXT/FXT
Provided with Core
Documentation
Product Specification
User Guide
Design File Formats
Verilog and VHDL
Constraints File
Verification
.ucf (user constraints file)
Example Design and Test Bench
Instantiation Template
Verilog or VHDL Wrapper
Design Tool Requirements
Xilinx Implementation
Tools
Verification
ISE™ 10.1⁽²⁾
Mentor Graphics^® ModelSim^® 6.3c
Simulation
Mentor Graphics ModelSim 6.3c
Synthesis
XST 10.1
Support
Provided by Xilinx, Inc. at www.xilinx.com/support
1. For more information on the Virtex-5 devices,
see DS100 Virtex-5 Family Overview
2. ISE Service Packs can be downloaded at
http://www.xilinx.com/support/download.htm.
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DS589 March 24, 2008
www.xilinx.com
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Product Specification