XC1700E Datasheet, PDF (10/12 Pages) Xilinx, Inc – XC1700E and XC1700L Series

XC1700E and XC1700L Series Configuration PROMs
R
AC Characteristics Over Operating Condition When Cascading
RESET/OE
CE
CLK
DATA
CEO
T_CDF
Last Bit
T_OCK
T_OCE
T_OOE
T_OCE
Symbol
Description
Min Max
Units
T_CDF
T_OCK
T_OCE
T_OOE
CLK to data float delay^(2,3)
CLK to CEO delay⁽³⁾
CE to CEO delay⁽³⁾
RESET/OE to CEO delay⁽³⁾
-
50
ns
-
30
ns
-
35
ns
-
30
ns
Notes:
1. AC test load = 50 pF
2. Float delays are measured with 5 pF AC loads. Transition is measured at ±200 mV from steady
state active levels.
3. Guaranteed by design, not tested.
4. All AC parameters are measured with V_IL = 0.0V and V_IH = 3.0V.
First Bit
DS027_04_021500
10
www.xilinx.com
DS027 (v3.1) July 5, 2000
1-800-255-7778
Product Specification