X46402 Datasheet, PDF (8/23 Pages) Xicor Inc. – Dual Voltage CPU Supervisor with 64K Password Protected EEPROM

X46402
Preliminary Information
Figure 7. X46402 Device Operation (Non-Password
Protected Areas)
LOAD COMMAND BYTE
LOAD 2 BYTE ADDRESS
READ/WRITE
DATA BYTES
Twc OR DATA ACK POLLING
Tamper Counter
The X46402 contains a tamper counter. The entry of an
invalid password increments the counter. This operation
requires an internal nonvolatile cycle, requiring up to 10
ms to complete. To minimize the possibility of of an unau-
thorized person monitoring the device current to detect
the enry of the correct password, an internal high voltage
cycle is initiated even when the counter does not incre-
ment. As such, each password entry requires up to
10ms to acknowledge, so a long period of time would be
required to correctly guess the password.
On the eighth incorrect password entry, a one-time pro-
grammable tamper bit is set in the Device ID area. The
Tamper Counter increments with each incorrect pass-
word attempt and cannot be reset, except by the Reset
Device Command. When the tamper counter overflows,
the device is “locked”. In the locked condition, none of the
password commands respond except Reset Device. No-
password commands are always available. The locked
condition is determined by reading the device ID and
reading bit 32. The device is reset by the Master Reset or
Reset Device commands.
Device Protocol
The X46402 supports a bidirectional bus oriented proto-
col. The protocol defines any device that sends data onto
the bus as a transmitter and the receiving device as a
receiver. The device controlling the transfer is a master
and the device being controlled is the slave. The master
will always initiate data transfers and provide the clock for
both transmit and receive operations. Therefore, the
X46402 will be considered a slave in all applications.
After each byte written to or read from the X46402, the
address pointer is incremented by 1. This allows the user
to read from the entire device after sending only a single
address. It also allows an entire page to be written in one
operation. An exception to this address incrementation
occurs during a read. After reading address 1FFFh the
device goes into an idle mode, so additional reads return
all “1s”.
Clock and Data Conventions
Data states on the SDA line can change only during SCL
LOW. SDA changes during SCL HIGH are reserved for
indicating start and stop conditions. Refer to Figure 8 and
Figure 9.
Start Condition
All commands are preceeded by the start condition,
which is a HIGH to LOW transition of SDA when SCL is
HIGH. The X46402 continuously monitors the SDA and
SCL lines for the start condition and will not respond to
any command until this condition is met.
A start may be issued to terminate the input of a control
byte or the input data to be written. This will reset the
device and leave it ready to begin a new read or write
command. A start bit generated while the part is output-
ting data is accepted as a start as long as the device is
not outputting a ’zero’.
Stop Condition
All communications are be terminated by a stop condi-
tion. The stop condition is a LOW to HIGH transition of
SDA when SCL is HIGH. The stop condition is also used
to reset the device during a command or data input
sequence and will leave the device in the standby power
mode. As with starts, stops are recognized while the
device outputs data, as long as the data output is not a
‘zero’.
Figure 8. Data Validity
SCL
SDA
Data Data
Stable Change
8