X46402 Datasheet, PDF (6/23 Pages) Xicor Inc. – Dual Voltage CPU Supervisor with 64K Password Protected EEPROM

X46402
Figure 5. Reset V2_TRIP Level Sequence (Vcc > 3V, WEL is set.)
V2_TRIP
V2MON
RESET
V_P = 15V
SCL
SDA
0 1 2 34 5 6 7
0 1 2 34 5 6 7
D8h
00h
Preliminary Information
0 1 2 34 5 6 7
0Fh
0Fh resets V2MON
V_CC AND V2MON THRESHOLD RESET PROCEDURE
The X46402 is shipped with standard V_TRIP, and V2_TRIP
voltages. These values will not change over normal oper-
ating and storage conditions. However, in applications
where the standard thresholds are not exactly right, or if
higher precision is needed in the threshold value, the
X46402 trip points may be adjusted. The procedure is
described below, and uses the application of a high volt-
age control signal.
Setting the V_TRIP Voltage
This procedure is used to set the V_TRIP,V2_TRIP to a higher
voltage value. For example, if the current V_TRIP is 4.4V
and the new V_TRIP is 4.6V, this procedure will directly
make the change. If the new setting is to be lower than
the current setting, then it is necessary to reset the trip
point before setting the new value.
To set the new voltages, apply the desired V_TRIP thresh-
old voltage to the Vcc pin, the V2_TRIP voltage to the
V2MON pin, then tie the RESET pin to the programming
voltage V_P. Then, write data 01h or 0Dh address 00h to
program V_TRIP, V2_TRIP respectively. The stop bit following
a valid write operation initiates the programming
sequence. Bring RESET LOW to complete the operation.
Note: this operation also writes 01h, or 0Dh to address
00h.
Resetting the V_TRIP Voltage
This procedure is used to set the V_TRIP, the V2_TRIP to a
“native” voltage level. For example, if the current V_TRIP is
4.4V and the new V_TRIP must be 4.0V, then the V_TRIP
must be reset. When the threshold is reset, the new level
is something less than 1.7V. This procedure must be
used to set the voltage to a lower value.
To reset the new V_TRIP, V2_TRIP voltage, apply the desired
V_TRIP or V2_TRIP threshold voltage to the Vcc or V2MON
pin, respectively, and tie the RESET pin to the program-
ming voltage V_P. Then write 03h or 0Fh to address 00h.
The stop bit of a valid write operation initiates the pro-
gramming sequence. Bring RESET LOW to complete the
operation. Note: this operation also writes 03h or 0Fh to
address 00h of the EEPROM array.
Figure 6. Sample V_TRIP Reset Circuit
V_TRIP
Adj.
V2FAIL
RESET
V2_TRIP
Adj.
4.7K
5
8
4
2
7 ^X46402 6
1
3
V_P
Adjust
Run
µC
SCL
SDA
6