X24641 Datasheet, PDF (5/13 Pages) Xicor Inc. – 400 KHz 2-Wire Serial E 2 PROM

X24641
DEVICE ADDRESSING
Following a start condition, the master must output the
address of the slave it is accessing. The first four bits
of the Slave Address Byte are the device type identifier
bits. These must equal “1010”. The next 3 bits are the
device select bits S₀, S₁, and S₂. This allows up to 8
devices to share a single bus. These bits are
compared to the S₀, S₁, and S₂ device select input
pins. The last bit of the Slave Address Byte defines the
operation to be performed. When the R/W bit is a one,
then a Read Operation is selected. When it is zero
then a Write Operation is selected. Refer to figure 4.
After loading the Slave Address Byte from the SDA
bus, the device compares the device type bits with the
value “1010” and the device select bits with the status
of the device select input pins. If the compare is not
successful, no acknowledge is output during the ninth
clock cycle and the device returns to the standby mode.
The byte address is either supplied by the master or
obtained from an internal counter, depending on the
operation. When required, the master must supply the
two Address Bytes as shown in figure 4.
The internal organization of the E²PROM array is 256
pages by 32 bytes per page. The page address is
partially contained in the Address Byte 1 and partially in
bits 7 through 5 of the Address Byte 0. The specific byte
address is contained in bits 4 through 0 of the Address
Byte 0. Refer to figure 4.
Figure 4. Device Addressing
DEVICE TYPE
IDENTIFIER
DEVICE
SELECT
1 0 1 0 S ₂ S1 S0 R/ W
SLAVE ADDRESS BYTE
HIGH ORDER ADDRESS
0 0 0 A12 A11 A10 A9 A8
ADDRESS BYTE 1
LOW ORDER ADDRESS
A7 A6 A5 A4 A3 A2 A1 A0
ADDRESS BYTE 0
D7 D6 D5 D4 D3 D2 D1 D0
DATA BYTE
7026 FM 06
5