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X9259 Datasheet, PDF (4/25 Pages) Xicor Inc. – Quad Digitally-Controlled (XDCP) Potentiometers
X9259
PIN DESCRIPTIONS
Bus Interface Pins
SERIAL DATA INPUT/OUTPUT (SDA)
The SDA is a bidirectional serial data input/output pin
for a 2-Wire slave device and is used to transfer data
into and out of the device. It receives device address,
opcode, wiper register address and data sent from an
2-Wire master at the rising edge of the serial clock
SCL, and it shifts out data after each falling edge of the
serial clock SCL.
It is an open drain output and may be wire-ORed with
any number of open drain or open collector outputs. An
open drain output requires the use of a pull-up resistor.
For selecting typical values, refer to the guidelines for
calculating typical values on the bus pull-up resistors
graph.
SERIAL CLOCK (SCL)
This input is used by 2-Wire master to supply 2-Wire
serial clock to the X9259.
DEVICE ADDRESS (A3–A0)
The Address inputs are used to set the least significant
4 bits of the 8-bit slave address. A match in the slave
address serial data stream must be made with the
Address input in order to initiate communication with
the X9259. A maximum of 16 devices may occupy the
2-Wire serial bus. Device pins A3-A0 must be tie to a
logic level which specify the external address of the
device, see figures 3, 4, and 5.
Potentiometer Pins
RH, RL
The RH and RL pins are equivalent to the terminal
connections on a mechanical potentiometer. Since
there are 4 potentiometers, there are 4 sets of RH and
RL such that RH0 and RL0 are the terminals of POT 0
and so on.
RW
The wiper pin are equivalent to the wiper terminal of a
mechanical potentiometer. Since there are 4
potentiometers, there are 4 sets of RW such that RW0
is the terminal of POT 0 and so on.
Bias Supply Pins
SYSTEM SUPPLY VOLTAGE (VCC) AND SUPPLY GROUND (VSS)
The VCC pin is the system supply voltage. The VSS pin
is the system ground.
Other Pins
NO CONNECT
No connect pins should be left open. This pins are used
for Xicor manufacturing and testing purposes.
HARDWARE WRITE PROTECT INPUT (WP)
The WP pin when LOW prevents nonvolatile writes to
the Data Registers.
REV 1.2.3 4/30/02
www.xicor.com
Characteristics subject to change without notice. 4 of 25