X9259 Datasheet, PDF (3/25 Pages) Xicor Inc. – Quad Digitally-Controlled (XDCP) Potentiometers

X9259
PIN CONFIGURATION
SOIC/TSSOP
NC1
A0
R_W3
R_H3
R_L3
NC
V_CC
R_L0
R_H0
R_W0
A2
WP
1
24
2
23
3
22
4
21
5
20
6
19
X9259
7
18
8
17
9
16
10
15
11
14
12
13
A3
SCL
R_L2
R_H2
R_W2
NC
V_SS
R_W1
R_H1
R_L1
A1
SDA
1
A
R_W0
R_L0
B
V_CC
C
NC
D
R_L3
E
R_W3
F
XBGA
2
3
A₂
A₁
WP
SDA
R_H0
R_H3
R_H1
R_H2
NC1
A3
A₀
SCL
4
R_L1
R_W1
V_SS
NC
R_W2
R_L2
Top View–Bumps Down
PIN ASSIGNMENTS
Pin
(SOIC/TSSOP)
Pin
(XBGA)
Symbol
Function
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
20
21
22
23
24
6, 19
1
F2
F1
D2
E1
E2
C1
B1
C2
A1
A2
B2
B3
A3
A4
C3
B4
C4
E4
D3
F4
F3
E3
D1, D4
E2
A0
R_W3
R_H3
R_L3
NC1
V_CC
R_L0
R_H0
R_W0
A2
WP
SDA
A1
R_L1
R_H1
R_W1
V_SS
R_W2
R_H2
R_L2
SCL
A3
NC
NC1
Device Address for 2-Wire bus. (See Note 1)
Wiper Terminal for Potentiometer 3.
High Terminal for Potentiometer 3.
Low Terminal for Potentiometer 3.
Must be left unconnected
System Supply Voltage
Low Terminal for Potentiometer 0.
High Terminal for Potentiometer 0.
Wiper Terminal for Potentiometer 0.
Device Address for 2-Wire bus. (See Note 1)
Hardware Write Protect
Serial Data Input/Output for 2-Wire bus.
Device Address for 2-Wire bus. (See Note 1)
Low Terminal for Potentiometer 1.
High Terminal for Potentiometer 1.
Wiper Terminal for Potentiometer 1.
System Ground
WiperTerminal for Potentiometer 2.
High Terminal for Potentiometer 2.
Low Terminal for Potentiometer 2.
Serial Clock for 2-Wire bus.
Device Address for 2-Wire Bus. (See Note 1)
No Connect
Must be left unconnected
Note 1: A0-A3 Device address pins must be tie to a logic level.
REV 1.2.3 4/30/02
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Characteristics subject to change without notice. 3 of 25