X9241 Datasheet, PDF (4/16 Pages) Xicor Inc. – Quad E2POT™ Nonvolatile Digital Potentiometer

X9241
Instruction Structure
The next byte sent to the X9241 contains the instruction
and register pointer information. The four most signifi-
cant bits are the instruction. The next four bits point to
one of four pots and when applicable they point to one
of four associated registers. The format is shown below
in Figure 2.
Figure 2. Instruction Byte Format
POTENTIOMETER
SELECT
I3 I2 I1 I0 P1 P0 R1 R0
INSTRUCTIONS
REGISTER
SELECT
3864 ILL F09.1
The four high order bits define the instruction. The next
two bits (P1 and P0) select which one of the four
potentiometers is to be affected by the instruction. The
last two bits (R1 and R0) select one of the four registers
that is to be acted upon when a register oriented instruc-
tion is issued.
Four of the nine instructions end with the transmission of
the instruction byte. The basic sequence is illustrated in
Figure 3. These two-byte instructions exchange data
between the WCR and one of the data registers. A
transfer from a data register to a WCR is essentially a
write to a static RAM. The response of the wiper to this
action will be delayed t_STPWV. A transfer from WCR
current wiper position, to a data register is a write to
nonvolatile memory and takes a minimum of t_WR to
complete. The transfer can occur between one of the
four potentiometers and one of its associated registers;
or it may occur globally, wherein the transfer occurs
between all four of the potentiometers and one of their
associated registers.
Four instructions require a three-byte sequence to
complete. These instructions transfer data between the
host and the X9241; either between the host and one of
the data registers or directly between the host and the
WCR. These instructions are: Read WCR, read the
current wiper position of the selected pot; Write WCR,
change current wiper position of the selected pot; Read
Data Register, read the contents of the selected non-
volatile register; Write Data Register, write a new value
to the selected data register. The sequence of opera-
tions is shown in Figure 4.
The Increment/Decrement command is different from
the other commands. Once the command is issued and
the X9241 has responded with an acknowledge, the
master can clock the selected wiper up and/or down in
one segment steps; thereby, providing a fine tuning
capability to the host. For each SCL clock pulse (t_HIGH)
while SDA is HIGH, the selected wiper will move one
resistor segment towards the V_H terminal. Similarly, for
each SCL clock pulse while SDA is LOW, the selected
wiper will move one resistor segment towards the V_L
terminal. A detailed illustration of the sequence and
timing for this operation are shown in Figures 5 and 6
respectively.
Figure 3. Two-Byte Command Sequence
SCL
SDA
S 0 1 0 1 A3 A2 A1 A0 A I3 I2 I1 I0 P1 P0 R1 R0 A S
T
C
CT
A
K
KO
R
P
T
3864 ILL F10
4