English
Language : 

X88257 Datasheet, PDF (4/15 Pages) Xicor Inc. – E2 Micro-Peripheral
X88257
DATA MEMORY MODE
This mode of operation allows both read and write
functions. The PSEN input is tied to VIH or to VCC
through a pull-up resistor. The ALE, RD, and WR inputs
are tied directly to the microcontroller ALE, RD, and WR
outputs.
Read
This operation is quite similar to the program memory
read. A HIGH to LOW transition on ALE latches the
addresses and the data will be output on the AD pins
after RD goes LOW (tRLDV).
Write
A write is performed by latching the addresses on the
falling edge of ALE. Then WR is strobed LOW followed
by valid data being presented at the A/D0–A/D7 pins.
The data will be latched into the X88257 on the rising
edge of WR. To write to the X88257, a three-byte
command sequence must precede the byte(s) being
written. (See Software Data Protection.)
MODE SELECTION
CE
PSEN
VCC
HIGH
LOW
LOW
LOW
X
X
LOW
HIGH
HIGH
RD
X
X
HIGH
LOW
HIGH
WR
X
X
HIGH
HIGH
Mode
Standby
Standby
Read
Read
Write
I/O
High Z
High Z
DOUT
DOUT
DIN
Power
Standby (CMOS)
Standby (TTL)
Active
Active
Active
6509 PGM T02
PAGE WRITE OPERATION
Regardless of the microcontroller employed, the X88257
supports page mode write operations. This allows the
microcontroller to write from 1 to 128 bytes of data to the
X88257. Each individual write within a page write opera-
tion must conform to the byte write timing requirements.
The falling edge of WR starts a timer delaying the
internal programming cycle 100µs. Therefore, each
successive write operation must begin within 100µs of
the last byte written. The following waveforms illustrate
the sequence and timing requirements.
Page Write Timing Sequence for WR Controlled Operation
OPERATION
CE
BYTE 0
BYTE 1
BYTE 2
LAST BYTE
READ (1)(2)
AFTER tWC READY FOR
NEXT WRITE OPERATION
ALE
A/D0–A/D7
A8–A14
WR
AIN DIN
An
AIN DIN
An
AIN DIN
An
AIN DIN
An
AIN DOUT
An
AIN
ADDR
AIN
Next Address
PSEN(RD)
tBLC
tWC
Notes: (1) For each successive write within a page write cycle A7–A14 must be the same.
6509 ILL F08.1
4