X28C64 Datasheet, PDF (2/25 Pages) Xicor Inc. – 5 Volt, Byte Alterable E2PROM

X28C64
PIN DESCRIPTIONS
Addresses (A₀–A₁₂)
The Address inputs select an 8-bit memory location
during a read or write operation.
Chip Enable (CE)
The Chip Enable input must be LOW to enable all read/
write operations. When CE is HIGH, power consumption
is reduced.
Output Enable (OE)
The Output Enable input controls the data output buffers
and is used to initiate read operations.
PIN NAMES
Symbol
A₀–A₁₂
I/O0–I/O7
WE
CE
OE
VCC
V_SS
NC
Description
Address Inputs
Data Input/Output
Write Enable
Chip Enable
Output Enable
+5V
Ground
No Connect
3853 PGM T01
FUNCTIONAL DIAGRAM
Data In/Data Out (I/O₀–I/O₇)
Data is written to or read from the X28C64 through the
I/O pins.
Write Enable (WE)
The Write Enable input controls the writing of data to the
X28C64.
PIN CONFIGURATION
PGA
I/O1 I/O2 I/O3 I/O5 I/O6
12
13
15
17
18
I/O0 A0
VSS I/O4 I/O7
11
10
14
16
19
A1
A2
9
8
CE A10
20 21
X28C64
A3
A4
OE A11
7
6
22 23
A5
A12 VCC A9
A8
5
2
28 24 25
A6
A7
NC WE NC
4
3
1
27 26
BOTTOM VIEW
3853 FHD F04
A0–A12
ADDRESS
INPUTS
X BUFFERS
LATCHES AND
DECODER
Y BUFFERS
LATCHES AND
DECODER
65,536-BIT
E2PROM
ARRAY
I/O BUFFERS
AND LATCHES
CE
OE
WE
VCC
VSS
CONTROL
LOGIC AND
TIMING
I/O0–I/O7
DATA INPUTS/OUTPUTS
3853 FHD F01
2