X68C75 Datasheet, PDF (18/26 Pages) Xicor Inc. – Port Expander and E2 Memory

X68C75 SLIC^® E²
E Controlled Write Cycle
No.
Symbol
1
PWASH
2
tASL
3
t_AHL
4
tDSW
5
tDHW
6
t_CSL
7
PWEH
8
tES
9
t_RWS
10
tEH
11
tWC
12
t_BLC
E Controlled Write Cycle
Parameter
Address Strobe Pulse Width
Address Setup Time
Address Hold Time
Data Setup Time
Data Hold Time
CE Setup Time
E Pulse Width
Enable Setup Time
R/W Setup Time
E Hold Time
Write Cycle Time
Byte Load Time (Page Write)
Min.
80
20
30
50
30
7
120
30
20
20
0.5
Max.
5
100
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
µs
2899 PGM T11
CE
AS
A/D0–A/D7
A8–A12
R/W
E
6
1
8
2
3
AIN
A8–A12
10
DIN
4
5
10
9
7
2899 ILL F22
Note: (4) t_WC is the minimum cycle time to be allowed from the system perspective unless polling techniques are used. It is the maximum
time the device requires to automatically complete the internal write operation.
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