X5043 Datasheet, PDF (13/20 Pages) Xicor Inc. – CPU Supervisor with 4K SPI EEPROM

X5043/X5045
Power-Up and Power-Down Timing
V_CC
V_TRIP
0 Volts
t_R
RESET (X5043)
t_PURST
t_PURST
V_TRIP
t_F
t_RPD
RESET (X5045)
RESET Output Timing
Symbol
V_TRIP
t_PURST
t_RPD⁽⁵⁾
t_F⁽⁵⁾
t_R⁽⁵⁾
V_RVALID
Parameter
Reset Trip Point Voltage, (-4.5A)
Reset Trip Point Voltage, (Blank)
Reset Trip Point Voltage, (-2.7A)
Reset Trip Point Voltage, (-2.7)
Power-up Reset Time Out
V_CC Detect to Reset/Output
V_CC Fall Time
V_CC Rise Time
Reset Valid V_CC
Note: (5) This parameter is periodically sampled and not 100% tested.
CS/WDI vs. RESET/RESET Timing
CS/WDI
RESET
t_CST
t_WDO
t_RST
Min.
4.5
4.25
2.85
2.55
100
10
0.1
1
Typ.
4.62
4.38
2.92
2.62
200
Max.
4.75
4.5
3.0
2.7
400
500
Unit
V
ms
ns
µs
ns
V
t_WDO
t_RST
RESET
RESET/RESET Output Timing
Symbol
t_WDO
t_CST
t_RST
Parameter
Watchdog Time Out Period,
WD1 = 1, WD0 = 0
WD1 = 0, WD0 = 1
WD1 = 0, WD0 = 0
CS Pulse Width to Reset the Watchdog
Reset Time Out
Min.
100
450
1
400
100
Typ.
200
600
1.4
200
Max.
300
800
2
400
Unit
ms
ms
sec
ns
ms
REV 1.1.2 5/29/01
www.xicor.com
Characteristics subject to change without notice. 13 of 20